a7y18lte-ubports/android_kernel_samsung_universal7885
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A530WVLU1BRH2

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Signed-off-by: BlackMesa123 <brother12@hotmail.it>
This commit is contained in:
BlackMesa123 2018-09-06 14:06:54 +02:00
parent 267f4e928c
commit 21f2e83642
39 changed files with 11381 additions and 82 deletions
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1
Makefile
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@ -256,6 +256,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/x86/ -e s/x86_64/x86/ \
# "make" in the configured kernel build directory always uses that.
# Default value for CROSS_COMPILE is not to prefix executables
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
export KBUILD_BUILDHOST := $(SUBARCH)
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%)

19
arch/arm64/boot/dts/exynos/Makefile
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@ -1,3 +1,13 @@
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN) := \
exynos7885-jackpotlte_can_open_00.dtb \
exynos7885-jackpotlte_can_open_01.dtb \
exynos7885-jackpotlte_can_open_02.dtb \
exynos7885-jackpotlte_can_open_03.dtb \
exynos7885-jackpotlte_can_open_04.dtb \
exynos7885-jackpotlte_can_open_05.dtb \
exynos7885-jackpotlte_can_open_06.dtb \
exynos7885-jackpotlte_can_open_07.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN) := \
exynos7885-jackpotlte_eur_open_00.dtb \
exynos7885-jackpotlte_eur_open_01.dtb \
@ -6,7 +16,10 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN) := \
exynos7885-jackpotlte_eur_open_04.dtb \
exynos7885-jackpotlte_eur_open_05.dtb \
exynos7885-jackpotlte_eur_open_06.dtb \
exynos7885-jackpotlte_eur_open_07.dtb
exynos7885-jackpotlte_eur_open_07.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM) := \
exynos7885-jackpotlte_jpn_dcm_00.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR) := \
exynos7885-jackpotlte_kor_00.dtb \
@ -16,7 +29,7 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR) := \
exynos7885-jackpotlte_kor_04.dtb \
exynos7885-jackpotlte_kor_05.dtb \
exynos7885-jackpotlte_kor_06.dtb \
exynos7885-jackpotlte_kor_07.dtb
exynos7885-jackpotlte_kor_07.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN) := \
exynos7885-jackpot2lte_eur_open_00.dtb \
@ -26,7 +39,7 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN) := \
exynos7885-jackpot2lte_eur_open_04.dtb \
exynos7885-jackpot2lte_eur_open_05.dtb \
exynos7885-jackpot2lte_eur_open_06.dtb \
exynos7885-jackpot2lte_eur_open_07.dtb
exynos7885-jackpot2lte_eur_open_07.dtb
always := $(dtb-y)

89
arch/arm64/boot/dts/exynos/battery_data_jackpotlte_can.dtsi Executable file
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@ -0,0 +1,89 @@
/*
* Jackpot Battery parameters device tree file for board IDs 04 and higher
*
* Copyright (C) 2017 Samsung Electronics, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/ {
battery {
battery,standard_curr = <2050>;
};
cable-info {
default_input_current = <1800>;
default_charging_current = <2000>;
full_check_current_1st = <300>;
full_check_current_2nd = <150>;
current_group_1 {
cable_number = <1 4 19 21 22 23 30>;
input_current = <500>;
charging_current = <500>;
};
current_group_2 {
cable_number = <2 25>;
input_current = <1000>;
charging_current = <1000>;
};
current_group_3 {
cable_number = <5>;
input_current = <1500>;
charging_current = <1500>;
};
current_group_4 {
cable_number = <6 7 8>;
input_current = <1650>;
charging_current = <2050>;
};
current_group_5 {
cable_number = <9>;
input_current = <1650>;
charging_current = <2050>;
};
current_group_6 {
cable_number = <10 12 14 15 27>;
input_current = <900>;
charging_current = <1200>;
};
current_group_7 {
cable_number = <13>;
input_current = <700>;
charging_current = <1200>;
};
current_group_8 {
cable_number = <24>;
input_current = <1000>;
charging_current = <450>;
};
current_group_9 {
cable_number = <26>;
input_current = <2000>;
charging_current = <1800>;
};
current_group_10 {
cable_number = <11 16 28>;
input_current = <650>;
charging_current = <1200>;
};
current_group_11 {
cable_number = <29>;
input_current = <500>;
charging_current = <1200>;
};
};
};

144
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_00.dts Executable file
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@ -0,0 +1,144 @@
/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
#include "exynos7885-jackpotlte_mst_00.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev00 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <0>;
model_info-hw_rev_end = <0>;
compatible = "samsung, JACKPOTLTE CAN rev00", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <6>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
};
/* sec-wf-thermistor */
sec_thermistor@6 {
status = "disabled";
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <2>;
};
pinctrl@13430000 {
motor: motor {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <1>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
motor_en_high: motor_en_high {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <3>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13890000 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
zh915@7F {
compatible = "zh915";
reg = <0x7F>;
pinctrl-names ="default", "motor_en_high";
pinctrl-0 = <&motor>;
pinctrl-1 = <&motor_en_high>;
status = "okay";
mot_boost_en = <&gpf3 4 0>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

144
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_01.dts Executable file
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@ -0,0 +1,144 @@
/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
#include "exynos7885-jackpotlte_mst_00.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev01 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <1>;
model_info-hw_rev_end = <1>;
compatible = "samsung, JACKPOTLTE CAN rev01", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <6>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
};
/* sec-wf-thermistor */
sec_thermistor@6 {
status = "disabled";
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <2>;
};
pinctrl@13430000 {
motor: motor {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <1>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
motor_en_high: motor_en_high {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <3>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13890000 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
zh915@7F {
compatible = "zh915";
reg = <0x7F>;
pinctrl-names ="default", "motor_en_high";
pinctrl-0 = <&motor>;
pinctrl-1 = <&motor_en_high>;
status = "okay";
mot_boost_en = <&gpf3 4 0>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

173
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_02.dts Executable file
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@ -0,0 +1,173 @@
/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev02 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <2>;
model_info-hw_rev_end = <2>;
compatible = "samsung, JACKPOTLTE CAN rev02", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
};
/* sec-wf-thermistor */
sec_thermistor@6 {
status = "disabled";
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <2>;
};
pinctrl@13430000 {
motor: motor {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <1>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
motor_en_high: motor_en_high {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <3>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13890000 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
zh915@7F {
compatible = "zh915";
reg = <0x7F>;
pinctrl-names ="default", "motor_en_high";
pinctrl-0 = <&motor>;
pinctrl-1 = <&motor_en_high>;
status = "okay";
mot_boost_en = <&gpf3 4 0>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

173
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_03.dts Executable file
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@ -0,0 +1,173 @@
/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_03.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev04 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <3>;
model_info-hw_rev_end = <3>;
compatible = "samsung, JACKPOTLTE CAN rev04", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
};
/* sec-wf-thermistor */
sec_thermistor@6 {
status = "disabled";
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <2>;
};
pinctrl@13430000 {
motor: motor {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <1>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
motor_en_high: motor_en_high {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <3>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13890000 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
zh915@7F {
compatible = "zh915";
reg = <0x7F>;
pinctrl-names ="default", "motor_en_high";
pinctrl-0 = <&motor>;
pinctrl-1 = <&motor_en_high>;
status = "okay";
mot_boost_en = <&gpf3 4 0>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

164
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_04.dts Executable file
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/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_04.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev05 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <4>;
model_info-hw_rev_end = <4>;
compatible = "samsung, JACKPOTLTE CAN rev05", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <2>;
};
pinctrl@13430000 {
motor: motor {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <1>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
motor_en_high: motor_en_high {
samsung,pins = "gpf3-4";
samsung,pin-function = <1>;
samsung,pin-pud = <3>;
samsung,pin-val = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13890000 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
zh915@7F {
compatible = "zh915";
reg = <0x7F>;
pinctrl-names ="default", "motor_en_high";
pinctrl-0 = <&motor>;
pinctrl-1 = <&motor_en_high>;
status = "okay";
mot_boost_en = <&gpf3 4 0>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

151
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_05.dts Executable file
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/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_05.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev05 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <5>;
model_info-hw_rev_end = <5>;
compatible = "samsung, JACKPOTLTE CAN rev05", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <1>;
};
pinctrl@139B0000 {
motor_pwm: motor_pwm {
samsung,pins = "gpg0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13830000 {
s2mu004-haptic@3A {
compatible = "sec,s2mu004-haptic";
reg = <0x3A>;
pinctrl-names = "default";
pinctrl-0 = <&motor_pwm>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

168
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_06.dts Executable file
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/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_06.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev06 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <6>;
model_info-hw_rev_end = <6>;
compatible = "samsung, JACKPOTLTE CAN rev06", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <1>;
};
pinctrl@139B0000 {
motor_pwm: motor_pwm {
samsung,pins = "gpg0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13830000 {
s2mu004-haptic@3A {
compatible = "sec,s2mu004-haptic";
reg = <0x3A>;
pinctrl-names = "default";
pinctrl-0 = <&motor_pwm>;
};
};
leds_ktd2692 {
compatible = "ktd2692";
flash_control = <&gpg1 2 0x1>;
max_current = <1360>; /* (IMax) */
flash_current = <1200>; /* (n/16)xIMax (1<=n<=16) */
movie_current = <175>; /* (n/16)*IMax/3 (1<=n<=16) */
factory_current = <175>; /* (n/16)xIMax/3 (1<=n<=16) */
torch_current = <75>; /* (n/16)xIMax/3 (1<=n<=16) */
torch_table_enable = <1>;
torch_table = <1 2 2 3 3 4 4 4 5 5>;
status = "okay";
pinctrl-names ="default","host","is";
pinctrl-0 = <&fimc_is_flash_is>;
pinctrl-1 = <&fimc_is_flash_host>;
pinctrl-2 = <&fimc_is_flash_is>;
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

151
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_07.dts Executable file
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/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_can_open_gpio_07.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "battery_data_jackpotlte_can.dtsi"
/ {
model = "Samsung JACKPOTLTE CAN rev07 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <7>;
model_info-hw_rev_end = <255>;
compatible = "samsung, JACKPOTLTE CAN rev07", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
mif,num_of_usim_det = <2>;
mif,usim-det0-gpio = <&gpa2 6 0>;
mif,usim-det1-gpio = <&gpa2 5 0>;
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <1>;
};
pinctrl@139B0000 {
motor_pwm: motor_pwm {
samsung,pins = "gpg0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13830000 {
s2mu004-haptic@3A {
compatible = "sec,s2mu004-haptic";
reg = <0x3A>;
pinctrl-names = "default";
pinctrl-0 = <&motor_pwm>;
};
};
i2c_5:i2c@13880000 {
abov@20 {
abov,firmware_name = "abov/a96t326_a5y18_can.fw";
};
};
};

171
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_00.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep2>;
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

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arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_03.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep2>;
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

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arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_04.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep2>;
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

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arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_05.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial2>;
pinctrl-1 = <&sleep2>;
initial2: initial-state {
PIN_IN(gpf3-4, DOWN, LV1); /* NC */
};
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_IN(gpp4-4, DOWN, LV1); /* NC */
PIN_IN(gpp4-5, DOWN, LV1); /* NC */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

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arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_06.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial2>;
pinctrl-1 = <&sleep2>;
initial2: initial-state {
PIN_IN(gpf3-4, DOWN, LV1); /* NC */
};
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_IN(gpp4-4, DOWN, LV1); /* NC */
PIN_IN(gpp4-5, DOWN, LV1); /* NC */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

177
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_07.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial2>;
pinctrl-1 = <&sleep2>;
initial2: initial-state {
PIN_IN(gpf3-4, DOWN, LV1); /* NC */
};
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_IN(gpp4-4, DOWN, LV1); /* NC */
PIN_IN(gpp4-5, DOWN, LV1); /* NC */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
};
};

82
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn-isdbt-00.dtsi Executable file
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/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/{
pinctrl@139B0000 {
spi3_idle: spi3-idle {
samsung,pins = "gpc2-5", "gpc2-4", "gpc2-7", "gpc2-6";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
};
spi3_cs_func: spi3-cs-func {
samsung,pins = "gpc2-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
};
spi_3: spi@13940000 {
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
dma-mode;
dmas = <&pdma0 25
&pdma0 24>;
status = "ok";
spi-clkoff-time = <100>;
pinctrl-names = "default", "idle";
pinctrl-0 = <&spi3_bus &spi3_cs_func>;
pinctrl-1 = <&spi3_idle>;
isdbt-spi@0 {
compatible = "isdbt_spi_comp";
reg = <0>;
spi-max-frequency = <20000000>;
controller-data {
samsung,spi-feedback-delay = <1>;
};
};
};
pinctrl@11CB0000 {
isdbt_int_init: isdbt-int-init {
samsung,pins = "gpa2-5";
samsung,pin-pud = <3>;
};
isdbt_int_sleep: isdbt-int-sleep {
samsung,pins = "gpa2-5";
samsung,pin-pud = <1>;
};
};
isdbt_fc8300_data {
compatible = "isdb_fc8300_pdata";
isdbt,isdb-gpio-pwr-en = <&gpg2 4 0>;
isdbt,isdb-gpio-irq = <&gpa2 5 0x01>;
isdbt,isdb-gpio-spi_do = <&gpc2 5 0>;
isdbt,isdb-gpio-spi_di = <&gpc2 4 0>;
isdbt,isdb-gpio-spi_cs = <&gpc2 6 0>;
isdbt,isdb-gpio-spi_clk = <&gpc2 7 0>;
isdbt,isdb-bbm-xtal-freq = <24000>;
pinctrl-names = "isdbt_on", "isdbt_off";
pinctrl-0 = <&isdbt_int_init>;
pinctrl-1 = <&isdbt_int_sleep>;
};
};

2237
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_common.dtsi Executable file
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145
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_00.dts Executable file
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/*
* SAMSUNG UNIVERSAL7885 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos7885-jackpotlte_jpn_common.dtsi"
#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
#include "exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi"
#include "exynos7885-jackpotlte_mst_02.dtsi"
#include "exynos7885-jackpotlte_svcled.dtsi"
#include "exynos7885-jackpotlte_jpn-isdbt-00.dtsi"
/ {
model = "Samsung JACKPOTLTE JPN DCM rev00 board based on EXYNOS7885";
model_info-chip = <7885>;
model_info-platform = "android";
model_info-subtype = "samsung";
model_info-hw_rev = <0>;
model_info-hw_rev_end = <255>;
compatible = "samsung, JACKPOTLTE JPN DCM rev00", "samsung,Universal7885";
/* SENSORHUB */
spi_4: spi@13980000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
interrupts = <0 277 0>;
num-cs = <1>;
status = "okay";
STM32F@0 {
compatible = "ssp,STM32F";
reg = <0>;
spi-max-frequency = <8000000>;
spi-cpol;
spi-cpha;
pinctrl-names = "default";
pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
gpio-controller;
#gpio-cells = <2>;
ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
ssp,ap_int-gpio = <&gpg1 6 0x01>;
ssp,rst-gpio = <&gpg3 5 0x01>;
ssp,boot0-gpio = <&gpg1 3 0x1>;
ssp,acc-position = <7>;
ssp,mag-position = <5>;
ssp-sns-combination = <0>;
ssp,prox-hi_thresh = <55>;
ssp,prox-low_thresh = <40>;
ssp,prox-detect_hi_thresh = <250>;
ssp,prox-detect_low_thresh = <130>;
ssp-ap-rev = <1>;
ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
55 35 84 243 129 255 167 2 43
230 232 191 252 243 208 9 197 21>;
ssp-mag-type = <1>;
ssp-glass-type = <0>;
ssp-acc-type = <1>;
ssp-pressure-type = <1>;
ssp-project-type = <1>;
controller-data {
cs-gpio = <&gpp8 0 0>;
samsung,spi-feedback-delay = <0>;
};
};
};
pinctrl@139B0000 {
nfc_pvdd_en: nfc_pvdd_en {
samsung,pins = "gpg1-5";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
nfc_firm: nfc_firm {
samsung,pins = "gpg1-4";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-val = <0>;
samsung,pin-con-pdn = <3>;
samsung,pin-pud-pdn = <0>;
};
};
i2c_2: i2c@13850000 {
sec-nfc@27 {
sec-nfc,firm-gpio = <&gpg1 4 1>;
sec-nfc,pvdd_en = <&gpg1 5 1>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
};
};
/* USIM DETECTION FOR CP */
usim_det {
pinctrl-names = "default";
pinctrl-0 = <&sim0_det_gpio>;
mif,num_of_usim_det = <1>;
mif,usim-det0-gpio = <&gpa2 6 0>;
};
/* motor control type : 1 = IFPMIC */
/* 2 = Mot driving IC */
motor {
motor,motor_type = <1>;
};
pinctrl@139B0000 {
motor_pwm: motor_pwm {
samsung,pins = "gpg0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
i2c@13830000 {
s2mu004-haptic@3A {
compatible = "sec,s2mu004-haptic";
reg = <0x3A>;
pinctrl-names = "default";
pinctrl-0 = <&motor_pwm>;
};
};
};

166
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi Executable file
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/*
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos_gpio_config_macros.dtsi"
/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
&pinctrl_0 {
/*
* Note:
* Please do not make "sleep-state" node for GPA group GPIOs.
* GPA group doesn't have power-down status.
*/
pinctrl-names = "default";
pinctrl-0 = <&initial0>;
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
/* 0x148F_0000(DISPAUD): gpb0~2 */
&pinctrl_1 {
pinctrl-names = "sleep";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
};
};
/* 0x1343_0000(FSYS): gpf0,2~4 */
&pinctrl_2 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial2>;
pinctrl-1 = <&sleep2>;
initial2: initial-state {
PIN_IN(gpf3-4, DOWN, LV1); /* NC */
};
sleep2: sleep-state {
PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
};
};
/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
&pinctrl_3 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&initial3>;
pinctrl-1 = <&sleep3>;
initial3: initial-state {
PIN_IN(gpp4-4, DOWN, LV1); /* NC */
PIN_IN(gpp4-5, DOWN, LV1); /* NC */
PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
};
sleep3: sleep-state {
PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
PIN_SLP(gpg1-0, INPUT, DOWN); /* NC */
PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
PIN_SLP(gpg2-6, PREV, NONE); /* LCD_PWR_EN */
PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
};
};

1
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_06.dtsi
View File

@ -21,6 +21,7 @@
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpa1-4, NONE, LV1); /* BIXVY_KEY */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};

1
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_07.dtsi
View File

@ -21,6 +21,7 @@
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
PIN_IN(gpa1-4, NONE, LV1); /* BIXVY_KEY */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};

5
arch/arm64/configs/exynos7885-jackpot2lte_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.148 Kernel Configuration
# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR is not set
CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN=y
CONFIG_EXYNOS_DTBTOOL=y
@ -4377,6 +4379,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set

5
arch/arm64/configs/exynos7885-jackpotlte_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.148 Kernel Configuration
# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN=y
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR is not set
# CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN is not set
CONFIG_EXYNOS_DTBTOOL=y
@ -4377,6 +4379,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set

5126
arch/arm64/configs/exynos7885-jackpotltecan_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

5
arch/arm64/configs/exynos7885-jackpotltekor_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.148 Kernel Configuration
# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR=y
# CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN is not set
CONFIG_EXYNOS_DTBTOOL=y
@ -4394,6 +4396,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set

8
arch/arm64/mach-exynos/Kconfig
View File

@ -18,10 +18,18 @@ choice
config MACH_EXYNOS7885_NONE
bool "None"
config MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN
bool "Galaxy A8 (SM-A530W)"
select EXYNOS_DTBTOOL
config MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN
bool "Galaxy A8 (SM-A530F)"
select EXYNOS_DTBTOOL
config MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM
bool "Galaxy A8 (SM-A530J)"
select EXYNOS_DTBTOOL
config MACH_EXYNOS7885_JACKPOTLTE_KOR
bool "Galaxy A8 (SM-A530N)"
select EXYNOS_DTBTOOL

8
drivers/ccic/Kconfig
View File

@ -20,6 +20,14 @@ config CCIC_S2MU004
If you say yes here you will get support for
for the S2MU004 USBPD chip.
config CCIC_VDM
bool "Using S2MU004 USB PD VDM Message"
depends on USE_CCIC
default n
help
If you say yes here you will get support for
for the S2MU004 USBPD chip.
config CCIC_S2MM005
bool "CCIC S2MM005"
depends on I2C

4
drivers/ccic/Makefile
View File

@ -4,7 +4,7 @@
obj-$(CONFIG_CCIC_S2MU004) += s2mu004-usbpd.o
obj-$(CONFIG_USE_CCIC) += usbpd.o usbpd_cc.o
obj-$(CONFIG_USE_CCIC) += usbpd_policy.o usbpd_manager.o pdic_notifier.o
obj-$(CONFIG_USE_CCIC) += usbpd_policy.o usbpd_manager.o pdic_notifier.o ccic_misc.o
obj-$(CONFIG_CCIC_S2MM005) += s2mm005_fw.o s2mm005_cc.o s2mm005_pd.o s2mm005.o
obj-$(CONFIG_CCIC_NOTIFIER) += ccic_notifier.o ccic_sysfs.o
obj-$(CONFIG_CCIC_ALTERNATE_MODE)+= ccic_alternate.o
obj-$(CONFIG_CCIC_ALTERNATE_MODE) += ccic_alternate.o ccic_misc.o

253
drivers/ccic/ccic_misc.c Normal file
View File

@ -0,0 +1,253 @@
/*
* driver/ccic/ccic_misc.c - S2MM005 CCIC MISC driver
*
* Copyright (C) 2017 Samsung Electronics
* Author: Wookwang Lee <wookwang.lee@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; If not, see <http://www.gnu.org/licenses/>.
*
*/
//serial_acm.c
#include <linux/miscdevice.h>
#include <linux/fs.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/poll.h>
#include <linux/ccic/ccic_misc.h>
static struct ccic_misc_dev *c_dev;
#define MAX_BUF 255
#define DEXDOCK_PRODUCT_ID 0xA020
#define NODE_OF_MISC "ccic_misc"
#define CCIC_IOCTL_UVDM _IOWR('C', 0, struct uvdm_data)
static inline int _lock(atomic_t *excl)
{
if (atomic_inc_return(excl) == 1) {
return 0;
} else {
atomic_dec(excl);
return -1;
}
}
static inline void _unlock(atomic_t *excl)
{
atomic_dec(excl);
}
static int ccic_misc_open(struct inode *inode, struct file *file)
{
int ret = 0;
pr_info("%s + open success\n", __func__);
if (!c_dev) {
pr_err("%s - error : c_dev is NULL\n", __func__);
ret = -ENODEV;
goto err;
}
if (_lock(&c_dev->open_excl)) {
pr_err("%s - error : device busy\n", __func__);
ret = -EBUSY;
goto err1;
}
if (!samsung_uvdm_ready()) {
// check if there is some connection
_unlock(&c_dev->open_excl);
pr_err("%s - error : uvdm is not ready\n", __func__);
ret = -EBUSY;
goto err1;
}
pr_info("%s - open success\n", __func__);
return 0;
err1:
err:
return ret;
}
static int ccic_misc_close(struct inode *inode, struct file *file)
{
if (c_dev)
_unlock(&c_dev->open_excl);
samsung_uvdm_close();
pr_info("%s - close success\n", __func__);
return 0;
}
static int send_uvdm_message(void *data, int size)
{
int ret;
pr_info("%s - size : %d\n", __func__, size);
ret = samsung_uvdm_out_request_message(data, size);
return ret;
}
static int receive_uvdm_message(void *data, int size)
{
int ret;
pr_info("%s - size : %d\n", __func__, size);
ret = samsung_uvdm_in_request_message(data);
return ret;
}
static long
ccic_misc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret = 0;
void *buf = NULL;
if (_lock(&c_dev->ioctl_excl)) {
pr_err("%s - error : ioctl busy - cmd : %d\n", __func__, cmd);
ret = -EBUSY;
goto err2;
}
switch (cmd) {
case CCIC_IOCTL_UVDM:
pr_info("%s - CCIC_IOCTL_UVDM cmd\n", __func__);
if (copy_from_user(&c_dev->u_data, (void __user *) arg,
sizeof(struct uvdm_data))) {
ret = -EIO;
pr_err("%s - copy_from_user error\n", __func__);
goto err1;
}
buf = kzalloc(MAX_BUF, GFP_KERNEL);
if (!buf) {
ret = -EINVAL;
pr_err("%s - kzalloc error\n", __func__);
goto err1;
}
if (c_dev->u_data.size > MAX_BUF) {
ret = -ENOMEM;
pr_err("%s - user data size is %d error\n", __func__, c_dev->u_data.size);
goto err;
}
if (c_dev->u_data.dir == DIR_OUT) {
if (copy_from_user(buf, c_dev->u_data.pData,\
c_dev->u_data.size)) {
ret = -EIO;
pr_err("%s - copy_from_user error\n", __func__);
goto err;
}
ret = send_uvdm_message(buf, c_dev->u_data.size);
if (ret <= 0) {
pr_err("%s - send_uvdm_message error\n", __func__);
goto err;
}
} else {
ret = receive_uvdm_message(buf, c_dev->u_data.size);
if (ret <= 0) {
pr_err("%s - receive_uvdm_message error\n", __func__);
goto err;
}
if (copy_to_user((void __user *)c_dev->u_data.pData,
buf, ret)) {
ret = -EIO;
pr_err("%s - copy_to_user error\n", __func__);
goto err;
}
}
break;
default:
pr_err("%s - unknown ioctl cmd : %d\n", __func__, cmd);
ret = -ENOIOCTLCMD;
goto err;
}
err:
kfree(buf);
err1:
_unlock(&c_dev->ioctl_excl);
err2:
return ret;
}
#ifdef CONFIG_COMPAT
static long
ccic_misc_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret = 0;
pr_info("%s - cmd : %d\n", __func__, cmd);
ret = ccic_misc_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
return ret;
}
#endif
static const struct file_operations ccic_misc_fops = {
.owner = THIS_MODULE,
.open = ccic_misc_open,
.release = ccic_misc_close,
.llseek = no_llseek,
.unlocked_ioctl = ccic_misc_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl = ccic_misc_compat_ioctl,
#endif
};
static struct miscdevice ccic_misc_device = {
.minor = MISC_DYNAMIC_MINOR,
.name = NODE_OF_MISC,
.fops = &ccic_misc_fops,
};
int ccic_misc_init(void)
{
int ret = 0;
ret = misc_register(&ccic_misc_device);
if (ret) {
pr_err("%s - return error : %d\n", __func__, ret);
goto err;
}
c_dev = kzalloc(sizeof(struct ccic_misc_dev), GFP_KERNEL);
if (!c_dev) {
ret = -ENOMEM;
pr_err("%s - kzalloc failed : %d\n", __func__, ret);
goto err1;
}
atomic_set(&c_dev->open_excl, 0);
atomic_set(&c_dev->ioctl_excl, 0);
pr_info("%s - register success\n", __func__);
return 0;
err1:
misc_deregister(&ccic_misc_device);
err:
return ret;
}
EXPORT_SYMBOL(ccic_misc_init);
void ccic_misc_exit(void)
{
pr_info("%s() called\n", __func__);
if (!c_dev)
return;
kfree(c_dev);
misc_deregister(&ccic_misc_device);
}
EXPORT_SYMBOL(ccic_misc_exit);

54
drivers/ccic/s2mu004-usbpd.c
View File

@ -68,7 +68,7 @@ static int s2mu004_usbpd_reg_init(struct s2mu004_usbpd_data *_data);
static void s2mu004_dfp(struct i2c_client *i2c);
static void s2mu004_ufp(struct i2c_client *i2c);
#ifdef CONFIG_CCIC_VDM
static int s2mu004_usbpd_check_vdm_msg(void *_data, int *val);
static int s2mu004_usbpd_check_vdm_msg(void *_data, u64 *val);
#endif
static void s2mu004_src(struct i2c_client *i2c);
static void s2mu004_snk(struct i2c_client *i2c);
@ -557,7 +557,7 @@ static bool s2mu004_poll_status(void *_data)
struct i2c_client *i2c = pdic_data->i2c;
struct device *dev = &i2c->dev;
u8 intr[S2MU004_MAX_NUM_INT_STATUS] = {0};
int ret = 0;
int ret = 0, retry = 0;
u64 status_reg_val = 0;
ret = s2mu004_usbpd_bulk_read(i2c, S2MU004_REG_INT_STATUS0,
@ -585,8 +585,21 @@ static bool s2mu004_poll_status(void *_data)
if ((intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
!pdic_data->lpm_mode && !pdic_data->is_water_detect)
status_reg_val |= PLUG_ATTACH;
else if (pdic_data->lpm_mode &&
(intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
!pdic_data->is_water_detect)
retry = 1;
mutex_unlock(&pdic_data->lpm_mutex);
if (retry) {
msleep(40);
mutex_lock(&pdic_data->lpm_mutex);
if ((intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
!pdic_data->lpm_mode && !pdic_data->is_water_detect)
status_reg_val |= PLUG_ATTACH;
mutex_unlock(&pdic_data->lpm_mutex);
}
#ifdef CONFIG_CCIC_VDM
/* function that support dp control */
if (pdic_data->check_msg_pass) {
@ -674,12 +687,12 @@ static bool s2mu004_poll_status(void *_data)
#ifdef CONFIG_CCIC_VDM
/* read message if data object message */
if (status_reg_val &
(MSG_REQUEST | MSG_SNK_CAP | MSG_SRC_CAP
(MSG_REQUEST | MSG_SNK_CAP
| VDM_DISCOVER_IDENTITY | VDM_DISCOVER_SVID
| VDM_DISCOVER_MODE | VDM_ENTER_MODE | VDM_EXIT_MODE
| VDM_ATTENTION | MSG_SOFTRESET | MSG_PASS)) {
| VDM_ATTENTION | MSG_PASS)) {
usbpd_protocol_rx(data);
if (status_reg_val == MSG_PASS && (pdic_data->data_role == USBPD_UFP))
if (status_reg_val & MSG_PASS)
s2mu004_usbpd_check_vdm_msg(data, &status_reg_val);
}
#else
@ -688,7 +701,7 @@ static bool s2mu004_poll_status(void *_data)
(MSG_REQUEST | MSG_SNK_CAP
| VDM_DISCOVER_IDENTITY | VDM_DISCOVER_SVID
| VDM_DISCOVER_MODE | VDM_ENTER_MODE | VDM_EXIT_MODE
| VDM_ATTENTION | MSG_SOFTRESET)) {
| VDM_ATTENTION)) {
usbpd_protocol_rx(data);
}
#endif
@ -949,6 +962,7 @@ static int s2mu004_set_power_role(void *_data, int val)
} else if (val == USBPD_DRP) {
pdic_data->is_pr_swap = false;
s2mu004_assert_drp(data);
return 0;
} else
return(-1);
@ -1075,19 +1089,32 @@ static void s2mu004_usbpd_set_rp_scr_sel(struct s2mu004_usbpd_data *pdic_data,
#endif
#ifdef CONFIG_CCIC_VDM
int s2mu004_usbpd_check_vdm_msg(void *_data, int *val)
int s2mu004_usbpd_check_vdm_msg(void *_data, u64 *val)
{
struct usbpd_data *data = (struct usbpd_data *) _data;
int vdm_command = 0;
int vdm_command = 0, vdm_type = 0;
if (data->protocol_rx.msg_header.num_data_objs == 0)
dev_info(data->dev, "%s ++\n", __func__);
if (data->protocol_rx.msg_header.num_data_objs == 0) {
dev_info(data->dev, "%s data_obj null\n", __func__);
return 0;
}
if (data->protocol_rx.msg_header.msg_type != USBPD_Vendor_Defined)
if (data->protocol_rx.msg_header.msg_type != USBPD_Vendor_Defined) {
dev_info(data->dev, "%s msg type is wrong\n", __func__);
return 0;
}
vdm_command = data->protocol_rx.data_obj[0].structured_vdm.command;
vdm_type = data->protocol_rx.data_obj[0].structured_vdm.vdm_type;
if (vdm_type == Unstructured_VDM) {
dev_info(data->dev, "%s : uvdm msg received!\n", __func__);
*val |= UVDM_MSG;
return 0;
}
#if 0
switch (vdm_command) {
case DisplayPort_Status_Update:
*val |= VDM_DP_STATUS_UPDATE;
@ -1098,7 +1125,7 @@ int s2mu004_usbpd_check_vdm_msg(void *_data, int *val)
default:
return 0;
}
#endif
dev_info(data->dev, "%s: check vdm mag val(%d)\n", __func__, vdm_command);
return 0;
@ -2085,8 +2112,8 @@ static void s2mu004_usbpd_notify_detach(struct s2mu004_usbpd_data *pdic_data)
pdic_data->power_role_dual == DUAL_ROLE_PROP_PR_SRC) {
vbus_turn_on_ctrl(pdic_data, VBUS_OFF);
muic_disable_otg_detect();
usbpd_manager_acc_detach(dev);
}
usbpd_manager_acc_detach(dev);
#if defined(CONFIG_DUAL_ROLE_USB_INTF)
pr_info("%s, data_role (%d)\n", __func__, pdic_data->data_role_dual);
if (pdic_data->data_role_dual == USB_STATUS_NOTIFY_ATTACH_DFP &&
@ -2335,6 +2362,9 @@ static irqreturn_t s2mu004_irq_thread(int irq, void *data)
goto out;
}
if (s2mu004_get_status(pd_data, MSG_SOFTRESET))
usbpd_rx_soft_reset(pd_data);
if (s2mu004_get_status(pd_data, PLUG_DETACH)) {
#if defined(CONFIG_SEC_FACTORY)
ret = s2mu004_usbpd_check_619k(pdic_data);

648
drivers/ccic/usbpd_manager.c
View File

@ -39,6 +39,9 @@
#include <linux/usb_notify.h>
#endif
#include <linux/completion.h>
#include <linux/ccic/ccic_misc.h>
bool force_dex_mode = false;
module_param(force_dex_mode, bool, 0755);
@ -61,6 +64,7 @@ extern struct device *ccic_device;
void s2mu004_select_pdo(int num)
{
struct usbpd_data *pd_data = pd_noti.pd_data;
struct usbpd_manager_data *manager = &pd_data->manager;
bool vbus_short;
pd_data->phy_ops.get_vbus_short_check(pd_data, &vbus_short);
@ -81,9 +85,7 @@ void s2mu004_select_pdo(int num)
pd_noti.sink_status.selected_pdo_num = num;
pr_info(" %s : PDO(%d) is selected to change\n", __func__, pd_noti.sink_status.selected_pdo_num);
msleep(50);
usbpd_manager_inform_event(pd_noti.pd_data, MANAGER_NEW_POWER_SRC);
schedule_delayed_work(&manager->select_pdo_handler, msecs_to_jiffies(50));
}
void select_pdo(int num)
@ -94,6 +96,46 @@ void select_pdo(int num)
#endif
#endif
void usbpd_manager_select_pdo_handler(struct work_struct *work)
{
pr_info("%s: call select pdo handler\n", __func__);
usbpd_manager_inform_event(pd_noti.pd_data, MANAGER_NEW_POWER_SRC);
}
void usbpd_manager_select_pdo_cancel(struct device *dev)
{
struct usbpd_data *pd_data = dev_get_drvdata(dev);
struct usbpd_manager_data *manager = &pd_data->manager;
cancel_delayed_work_sync(&manager->select_pdo_handler);
}
void usbpd_manager_start_discover_msg_handler(struct work_struct *work)
{
struct usbpd_manager_data *manager =
container_of(work, struct usbpd_manager_data,
start_discover_msg_handler.work);
pr_info("%s: call handler\n", __func__);
mutex_lock(&manager->vdm_mutex);
if (manager->alt_sended == 0 && manager->vdm_en == 1) {
usbpd_manager_inform_event(pd_noti.pd_data,
MANAGER_START_DISCOVER_IDENTITY);
manager->alt_sended = 1;
}
mutex_unlock(&manager->vdm_mutex);
}
void usbpd_manager_start_discover_msg_cancel(struct device *dev)
{
struct usbpd_data *pd_data = dev_get_drvdata(dev);
struct usbpd_manager_data *manager = &pd_data->manager;
cancel_delayed_work_sync(&manager->start_discover_msg_handler);
}
static void init_source_cap_data(struct usbpd_manager_data *_data)
{
/* struct usbpd_data *pd_data = manager_to_usbpd(_data);
@ -147,46 +189,326 @@ static void init_sink_cap_data(struct usbpd_manager_data *_data)
(data_obj + 1)->power_data_obj_variable.max_current = 500 / 10;
}
int samsung_uvdm_ready(void)
{
int uvdm_ready = false;
struct s2mu004_usbpd_data *pdic_data;
struct usbpd_data *pd_data;
struct usbpd_manager_data *manager;
pr_info("%s\n", __func__);
if(!ccic_device) {
pr_info("ccic_dev is null\n");
return -ENXIO;
}
pdic_data = dev_get_drvdata(ccic_device);
if (!pdic_data) {
pr_info("pdic_data is null\n");
return -ENXIO;
}
pd_data = dev_get_drvdata(pdic_data->dev);
if (!pd_data) {
pr_info("pd_data is null\n");
return -ENXIO;
}
manager = &pd_data->manager;
if (!manager) {
pr_info("manager is null\n");
return -ENXIO;
}
if (manager->is_samsung_accessory_enter_mode)
uvdm_ready = true;
pr_info("uvdm ready = %d", uvdm_ready);
return uvdm_ready;
}
void samsung_uvdm_close(void)
{
struct s2mu004_usbpd_data *pdic_data;
struct usbpd_data *pd_data;
struct usbpd_manager_data *manager;
pr_info("%s\n", __func__);
if(!ccic_device) {
pr_info("ccic_dev is null\n");
return;
}
pdic_data = dev_get_drvdata(ccic_device);
if (!pdic_data) {
pr_info("pdic_data is null\n");
return;
}
pd_data = dev_get_drvdata(pdic_data->dev);
if (!pd_data) {
pr_info("pd_data is null\n");
return;
}
manager = &pd_data->manager;
if (!manager) {
pr_info("manager is null\n");
return;
}
complete(&manager->uvdm_out_wait);
complete(&manager->uvdm_in_wait);
}
void set_endian(char *src, char *dest, int size)
{
int i, j;
int loop;
int dest_pos;
int src_pos;
loop = size / SEC_UVDM_ALIGN;
loop += (((size % SEC_UVDM_ALIGN) > 0) ? 1:0);
for (i = 0 ; i < loop ; i++)
for (j = 0 ; j < SEC_UVDM_ALIGN ; j++) {
src_pos = SEC_UVDM_ALIGN * i + j;
dest_pos = SEC_UVDM_ALIGN * i + SEC_UVDM_ALIGN - j - 1;
dest[dest_pos] = src[src_pos];
}
}
int get_checksum(char *data, int start_addr, int size)
{
int checksum = 0;
int i;
for (i = 0; i < size; i++)
checksum += data[start_addr+i];
return checksum;
}
int set_uvdmset_count(int size)
{
int ret = 0;
if (size <= SEC_UVDM_MAXDATA_FIRST)
ret = 1;
else {
ret = ((size-SEC_UVDM_MAXDATA_FIRST) / SEC_UVDM_MAXDATA_NORMAL);
if (((size-SEC_UVDM_MAXDATA_FIRST) % SEC_UVDM_MAXDATA_NORMAL) == 0)
ret += 1;
else
ret += 2;
}
return ret;
}
void set_msg_header(void *data, int msg_type, int obj_num)
{
msg_header_type *msg_hdr;
uint8_t *SendMSG = (uint8_t *)data;
msg_hdr = (msg_header_type *)&SendMSG[0];
msg_hdr->msg_type = msg_type;
msg_hdr->num_data_objs = obj_num;
msg_hdr->port_data_role = USBPD_DFP;
return;
}
void set_uvdm_header(void *data, int vid, int vdm_type)
{
uvdm_header *uvdm_hdr;
uint8_t *SendMSG = (uint8_t *)data;
uvdm_hdr = (uvdm_header *)&SendMSG[0];
uvdm_hdr->vendor_id = SAMSUNG_VENDOR_ID;
uvdm_hdr->vdm_type = vdm_type;
uvdm_hdr->vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
return;
}
void set_sec_uvdm_header(void *data, int pid, bool data_type, int cmd_type,
bool dir, int total_set_num, uint8_t received_data)
{
s_uvdm_header *SEC_UVDM_HEADER;
uint8_t *SendMSG = (uint8_t *)data;
SEC_UVDM_HEADER = (s_uvdm_header *)&SendMSG[4];
SEC_UVDM_HEADER->pid = pid;
SEC_UVDM_HEADER->data_type = data_type;
SEC_UVDM_HEADER->cmd_type = cmd_type;
SEC_UVDM_HEADER->direction = dir;
SEC_UVDM_HEADER->total_set_num = total_set_num;
SEC_UVDM_HEADER->data = received_data;
pr_info("%s pid = 0x%x data_type=%d ,cmd_type =%d,direction= %d, total_num_of_uvdm_set = %d\n",
__func__, SEC_UVDM_HEADER->pid,
SEC_UVDM_HEADER->data_type,
SEC_UVDM_HEADER->cmd_type,
SEC_UVDM_HEADER->direction,
SEC_UVDM_HEADER->total_set_num);
return;
}
int get_data_size(int first_set, int remained_data_size)
{
int ret = 0;
if (first_set)
ret = (remained_data_size <= SEC_UVDM_MAXDATA_FIRST) ? \
remained_data_size : SEC_UVDM_MAXDATA_FIRST;
else
ret = (remained_data_size <= SEC_UVDM_MAXDATA_NORMAL) ? \
remained_data_size : SEC_UVDM_MAXDATA_NORMAL;
return ret;
}
void set_sec_uvdm_tx_header(void *data, int first_set, int cur_set, int total_size,
int remained_size)
{
s_tx_header *SEC_TX_HAEDER;
uint8_t *SendMSG = (uint8_t*)data;
if(first_set)
SEC_TX_HAEDER = (s_tx_header *)&SendMSG[8];
else
SEC_TX_HAEDER = (s_tx_header *)&SendMSG[4];
SEC_TX_HAEDER->cur_size = get_data_size(first_set,remained_size);
SEC_TX_HAEDER->total_size = total_size;
SEC_TX_HAEDER->order_cur_set = cur_set;
return;
}
void set_sec_uvdm_tx_tailer(void *data)
{
s_tx_tailer *SEC_TX_TAILER;
uint8_t *SendMSG = (uint8_t *)data;
SEC_TX_TAILER = (s_tx_tailer *)&SendMSG[24];
SEC_TX_TAILER->checksum = get_checksum(SendMSG, 4,SEC_UVDM_CHECKSUM_COUNT);
return;
}
void set_sec_uvdm_rx_header(void *data, int cur_num, int cur_set, int ack)
{
s_rx_header *SEC_RX_HEADER;
uint8_t *SendMSG = (uint8_t*)data;
SEC_RX_HEADER = (s_rx_header *)&SendMSG[4];
SEC_RX_HEADER->order_cur_set = cur_num;
SEC_RX_HEADER->rcv_data_size = cur_set;
SEC_RX_HEADER->result_value = ack;
return;
}
int usbpd_manager_send_samsung_uvdm_message(void *data, const char *buf, size_t size)
{
struct s2mu004_usbpd_data *pdic_data = data;
struct usbpd_data *pd_data = dev_get_drvdata(pdic_data->dev);
struct policy_data *policy = &pd_data->policy;
struct usbpd_manager_data *manager = &pd_data->manager;
int received_data = 0;
int data_role = 0;
int power_role = 0;
if ((buf == NULL)||(size < sizeof(unsigned int))) {
pr_info("%s given data is not valid !\n", __func__);
pr_err("%s given data is not valid !\n", __func__);
return -EINVAL;
}
sscanf(buf, "%d", &received_data);
data_role = pd_data->phy_ops.get_data_role(pd_data, &data_role);
pd_data->phy_ops.get_data_role(pd_data, &data_role);
if (data_role == USBPD_UFP) {
pr_info("%s, skip, now data role is ufp\n", __func__);
pr_err("%s, skip, now data role is ufp\n", __func__);
return 0;
}
data_role = pd_data->phy_ops.get_power_role(pd_data, &power_role);
policy->tx_msg_header.msg_type = USBPD_UVDM_MSG;
policy->tx_msg_header.port_data_role = USBPD_DFP;
policy->tx_msg_header.port_power_role = power_role;
policy->tx_data_obj[0].unstructured_vdm.vendor_id = SAMSUNG_VENDOR_ID;
policy->tx_data_obj[0].unstructured_vdm.vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
policy->tx_data_obj[1].object = received_data;
if (policy->tx_data_obj[1].sec_uvdm_header.data_type == SEC_UVDM_SHORT_DATA) {
manager->uvdm_msg_header.msg_type = USBPD_UVDM_MSG;
manager->uvdm_msg_header.port_data_role = USBPD_DFP;
manager->uvdm_msg_header.port_power_role = power_role;
manager->uvdm_data_obj[0].unstructured_vdm.vendor_id = SAMSUNG_VENDOR_ID;
manager->uvdm_data_obj[0].unstructured_vdm.vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
manager->uvdm_data_obj[1].object = received_data;
if (manager->uvdm_data_obj[1].sec_uvdm_header.data_type == SEC_UVDM_SHORT_DATA) {
pr_info("%s - process short data!\n", __func__);
// process short data
// phase 1. fill message header
policy->tx_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
manager->uvdm_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
// phase 2. fill uvdm header (already filled)
// phase 3. fill sec uvdm header
policy->tx_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
manager->uvdm_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
} else {
pr_info("%s - process long data!\n", __func__);
// process long data
// phase 1. fill message header
// phase 2. fill uvdm header
// phase 3. fill sec uvdm header
}
usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
return 0;
}
ssize_t samsung_uvdm_out_request_message(void *data, size_t size)
{
struct s2mu004_usbpd_data *pdic_data;
struct usbpd_data *pd_data;
struct usbpd_manager_data *manager;
uint8_t *SEC_DATA;
uint8_t rcv_data[MAX_INPUT_DATA] = {0,};
int need_set_cnt = 0;
int cur_set_data = 0;
int cur_set_num = 0;
int remained_data_size = 0;
int accumulated_data_size = 0;
int received_data_index = 0;
int time_left = 0;
int i;
pr_info("%s++\n", __func__);
if(!ccic_device) {
pr_err("ccic_dev is null\n");
return -ENXIO;
}
pdic_data = dev_get_drvdata(ccic_device);
if (!pdic_data) {
pr_err("pdic_data is null\n");
return -ENXIO;
}
pd_data = dev_get_drvdata(pdic_data->dev);
if (!pd_data) {
pr_err("pd_data is null\n");
return -ENXIO;
}
manager = &pd_data->manager;
if (!manager) {
pr_err("manager is null\n");
return -ENXIO;
}
pr_info("%s \n", __func__);
set_msg_header(&manager->uvdm_msg_header,USBPD_Vendor_Defined,7);
set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
if (size <= 1) {
pr_info("%s - process short data!\n", __func__);
// process short data
// phase 1. fill message header
manager->uvdm_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
// phase 2. fill uvdm header (already filled)
// phase 3. fill sec uvdm header
manager->uvdm_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
} else {
pr_info("%s - process long data!\n", __func__);
// process long data
@ -194,13 +516,252 @@ int usbpd_manager_send_samsung_uvdm_message(void *data, const char *buf, size_t
// phase 2. fill uvdm header
// phase 3. fill sec uvdm header
// phase 4.5.6.7 fill sec data header , data , sec data tail and so on.
set_endian(data, rcv_data, size);
need_set_cnt = set_uvdmset_count(size);
manager->uvdm_first_req = true;
manager->uvdm_dir = DIR_OUT;
cur_set_num = 1;
accumulated_data_size = 0;
remained_data_size = size;
if (manager->uvdm_first_req)
set_sec_uvdm_header(&manager->uvdm_data_obj[0], manager->Product_ID,
SEC_UVDM_LONG_DATA,SEC_UVDM_ININIATOR, DIR_OUT,
need_set_cnt, 0);
while (cur_set_num <= need_set_cnt) {
cur_set_data = 0;
time_left = 0;
set_sec_uvdm_tx_header(&manager->uvdm_data_obj[0], manager->uvdm_first_req,
cur_set_num, size, remained_data_size);
cur_set_data = get_data_size(manager->uvdm_first_req,remained_data_size);
pr_info("%s current set data size: %d, total data size %ld, current uvdm set num %d\n", __func__, cur_set_data, size, cur_set_num);
if (manager->uvdm_first_req) {
SEC_DATA = (uint8_t *)&manager->uvdm_data_obj[3];
for ( i = 0; i < SEC_UVDM_MAXDATA_FIRST; i++)
SEC_DATA[i] = rcv_data[received_data_index++];
} else {
SEC_DATA = (uint8_t *)&manager->uvdm_data_obj[2];
for ( i = 0; i < SEC_UVDM_MAXDATA_NORMAL; i++)
SEC_DATA[i] = rcv_data[received_data_index++];
}
set_sec_uvdm_tx_tailer(&manager->uvdm_data_obj[0]);
reinit_completion(&manager->uvdm_out_wait);
usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
time_left = wait_for_completion_interruptible_timeout(&manager->uvdm_out_wait, msecs_to_jiffies(SEC_UVDM_WAIT_MS));
if (time_left <= 0) {
pr_err("%s tiemout \n",__func__);
return -ETIME;
}
accumulated_data_size += cur_set_data;
remained_data_size -= cur_set_data;
if (manager->uvdm_first_req)
manager->uvdm_first_req = false;
cur_set_num++;
}
return size;
}
usbpd_send_msg(pd_data, &policy->tx_msg_header, policy->tx_data_obj);
return 0;
}
int samsung_uvdm_in_request_message(void *data)
{
struct s2mu004_usbpd_data *pdic_data;
struct usbpd_data *pd_data;
struct usbpd_manager_data *manager;
struct policy_data *policy;
uint8_t in_data[MAX_INPUT_DATA] = {0,};
s_uvdm_header SEC_RES_HEADER;
s_tx_header SEC_TX_HEADER;
s_tx_tailer SEC_TX_TAILER;
data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
msg_header_type uvdm_msg_header;
int cur_set_data = 0;
int cur_set_num = 0;
int total_set_num = 0;
int rcv_data_size = 0;
int total_rcv_size = 0;
int ack = 0;
int size = 0;
int time_left = 0;
int i;
int cal_checksum = 0;
pr_info("%s\n", __func__);
if(!ccic_device)
return -ENXIO;
pdic_data = dev_get_drvdata(ccic_device);
if (!pdic_data) {
pr_err("pdic_data is null\n");
return -ENXIO;
}
pd_data = dev_get_drvdata(pdic_data->dev);
if (!pd_data)
return -ENXIO;
manager = &pd_data->manager;
if (!manager)
return -ENXIO;
policy = &pd_data->policy;
if (!policy)
return -ENXIO;
manager->uvdm_dir = DIR_IN;
manager->uvdm_first_req = true;
uvdm_msg_header.word = policy->rx_msg_header.word;
/* 2. Common : Fill the MSGHeader */
set_msg_header(&manager->uvdm_msg_header, USBPD_Vendor_Defined, 2);
/* 3. Common : Fill the UVDMHeader*/
set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
/* 4. Common : Fill the First SEC_VDMHeader*/
if(manager->uvdm_first_req)
set_sec_uvdm_header(&manager->uvdm_data_obj[0], manager->Product_ID,\
SEC_UVDM_LONG_DATA, SEC_UVDM_ININIATOR, DIR_IN, 0, 0);
/* 5. Send data to PDIC */
reinit_completion(&manager->uvdm_in_wait);
usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
cur_set_num = 0;
total_set_num = 1;
do {
time_left =
wait_for_completion_interruptible_timeout(&manager->uvdm_in_wait,
msecs_to_jiffies(SEC_UVDM_WAIT_MS));
if (time_left <= 0) {
pr_err("%s timeout\n", __func__);
return -ETIME;
}
/* read data */
uvdm_msg_header.word = policy->rx_msg_header.word;
for (i = 0; i < uvdm_msg_header.num_data_objs; i++)
uvdm_data_obj[i].object = policy->rx_data_obj[i].object;
if (manager->uvdm_first_req) {
SEC_RES_HEADER.object = uvdm_data_obj[1].object;
SEC_TX_HEADER.object = uvdm_data_obj[2].object;
if (SEC_RES_HEADER.data_type == TYPE_SHORT) {
in_data[rcv_data_size++] = SEC_RES_HEADER.data;
return rcv_data_size;
} else {
/* 1. check the data size received */
size = SEC_TX_HEADER.total_size;
cur_set_data = SEC_TX_HEADER.cur_size;
cur_set_num = SEC_TX_HEADER.order_cur_set;
total_set_num = SEC_RES_HEADER.total_set_num;
manager->uvdm_first_req = false;
/* 2. copy data to buffer */
for (i = 0; i < SEC_UVDM_MAXDATA_FIRST; i++) {
in_data[rcv_data_size++] =uvdm_data_obj[3+i/SEC_UVDM_ALIGN].byte[i%SEC_UVDM_ALIGN];
}
total_rcv_size += cur_set_data;
manager->uvdm_first_req = false;
}
} else {
SEC_TX_HEADER.object = uvdm_data_obj[1].object;
cur_set_data = SEC_TX_HEADER.cur_size;
cur_set_num = SEC_TX_HEADER.order_cur_set;
/* 2. copy data to buffer */
for (i = 0 ; i < SEC_UVDM_MAXDATA_NORMAL; i++)
in_data[rcv_data_size++] = uvdm_data_obj[2+i/SEC_UVDM_ALIGN].byte[i%SEC_UVDM_ALIGN];
total_rcv_size += cur_set_data;
}
/* 3. Check Checksum */
SEC_TX_TAILER.object =uvdm_data_obj[6].object;
cal_checksum = get_checksum((char *)&uvdm_data_obj[0], 4, SEC_UVDM_CHECKSUM_COUNT);
ack = (cal_checksum == SEC_TX_TAILER.checksum) ? RX_ACK : RX_NAK;
/* 5. Common : Fill the MSGHeader */
set_msg_header(&manager->uvdm_msg_header, USBPD_Vendor_Defined, 2);
/* 5.1. Common : Fill the UVDMHeader*/
set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
/* 5.2. Common : Fill the First SEC_VDMHeader*/
set_sec_uvdm_rx_header(&manager->uvdm_data_obj[0], cur_set_num, cur_set_data, ack);
reinit_completion(&manager->uvdm_in_wait);
usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
} while ( cur_set_num < total_set_num);
set_endian(in_data, data, size);
return size;
}
void usbpd_manager_receive_samsung_uvdm_message(struct usbpd_data *pd_data)
{
struct policy_data *policy = &pd_data->policy;
int i = 0;
msg_header_type uvdm_msg_header;
data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
struct usbpd_manager_data *manager = &pd_data->manager;
s_uvdm_header SEC_UVDM_RES_HEADER;
//s_uvdm_header SEC_UVDM_HEADER;
s_rx_header SEC_UVDM_RX_HEADER;
uvdm_msg_header.word = policy->rx_msg_header.word;
for (i = 0; i < uvdm_msg_header.num_data_objs; i++)
uvdm_data_obj[i].object = policy->rx_data_obj[i].object;
uvdm_msg_header.word = policy->rx_msg_header.word;
pr_info("%s dir %s \n", __func__, (manager->uvdm_dir==DIR_OUT)?"OUT":"IN");
if (manager->uvdm_dir == DIR_OUT) {
if (manager->uvdm_first_req) {
SEC_UVDM_RES_HEADER.object = uvdm_data_obj[1].object;
if (SEC_UVDM_RES_HEADER.data_type == TYPE_LONG) {
if (SEC_UVDM_RES_HEADER.cmd_type == RES_ACK) {
SEC_UVDM_RX_HEADER.object = uvdm_data_obj[2].object;
if (SEC_UVDM_RX_HEADER.result_value != RX_ACK)
pr_err("%s Busy or Nak received.\n", __func__);
} else
pr_err("%s Response type is wrong.\n", __func__);
} else {
if ( SEC_UVDM_RES_HEADER.cmd_type == RES_ACK)
pr_err("%s Short packet: ack received\n", __func__);
else
pr_err("%s Short packet: Response type is wrong\n", __func__);
}
/* Dir: out */
} else {
SEC_UVDM_RX_HEADER.object = uvdm_data_obj[1].object;
if (SEC_UVDM_RX_HEADER.result_value != RX_ACK)
pr_err("%s Busy or Nak received.\n", __func__);
}
complete(&manager->uvdm_out_wait);
} else {
if (manager->uvdm_first_req) {
SEC_UVDM_RES_HEADER.object = uvdm_data_obj[1].object;
if (SEC_UVDM_RES_HEADER.cmd_type != RES_ACK) {
pr_err("%s Busy or Nak received.\n", __func__);
return;
}
}
complete(&manager->uvdm_in_wait);
}
return;
}
void usbpd_manager_plug_attach(struct device *dev, muic_attached_dev_t new_dev)
{
#ifdef CONFIG_BATTERY_SAMSUNG
@ -271,7 +832,7 @@ int usbpd_manager_command_to_policy(struct device *dev,
struct usbpd_data *pd_data = dev_get_drvdata(dev);
struct usbpd_manager_data *manager = &pd_data->manager;
manager->cmd = command;
manager->cmd |= command;
usbpd_kick_policy_work(dev);
@ -321,6 +882,17 @@ void usbpd_manager_inform_event(struct usbpd_data *pd_data,
usbpd_manager_command_to_policy(pd_data->dev,
MANAGER_REQ_NEW_POWER_SRC);
break;
case MANAGER_UVDM_SEND_MESSAGE:
usbpd_manager_command_to_policy(pd_data->dev,
MANAGER_REQ_UVDM_SEND_MESSAGE);
break;
case MANAGER_UVDM_RECEIVE_MESSAGE:
usbpd_manager_receive_samsung_uvdm_message(pd_data);
break;
case MANAGER_START_DISCOVER_IDENTITY:
usbpd_manager_command_to_policy(pd_data->dev,
MANAGER_REQ_VDM_DISCOVER_IDENTITY);
break;
default:
pr_info("%s: not matched event(%d)\n", __func__, event);
}
@ -339,12 +911,12 @@ bool usbpd_manager_vdm_request_enabled(struct usbpd_data *pd_data)
return(1);
*/
if (manager->alt_sended)
return false;
else {
manager->alt_sended = 1;
return true;
}
manager->vdm_en = 1;
schedule_delayed_work(&manager->start_discover_msg_handler,
msecs_to_jiffies(50));
return true;
}
bool usbpd_manager_power_role_swap(struct usbpd_data *pd_data)
@ -474,6 +1046,7 @@ void usbpd_manager_acc_detach_handler(struct work_struct *wk)
manager->acc_type = CCIC_DOCK_DETACHED;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
manager->is_samsung_accessory_enter_mode = false;
}
}
}
@ -622,6 +1195,10 @@ int usbpd_manager_get_modes(struct usbpd_data *pd_data)
int usbpd_manager_enter_mode(struct usbpd_data *pd_data)
{
struct policy_data *policy = &pd_data->policy;
struct usbpd_manager_data *manager = &pd_data->manager;
manager->Standard_Vendor_ID = policy->rx_data_obj[0].structured_vdm.svid;
manager->is_samsung_accessory_enter_mode = true;
return 0;
}
@ -836,12 +1413,18 @@ void usbpd_init_manager_val(struct usbpd_data *pd_data)
pr_info("%s\n", __func__);
manager->alt_sended = 0;
manager->cmd = 0;
manager->vdm_en = 0;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
manager->Device_Version = 0;
manager->SVID_0 = 0;
manager->SVID_1 = 0;
manager->Standard_Vendor_ID = 0;
reinit_completion(&manager->uvdm_out_wait);
reinit_completion(&manager->uvdm_in_wait);
usbpd_manager_select_pdo_cancel(pd_data->dev);
usbpd_manager_start_discover_msg_cancel(pd_data->dev);
}
int usbpd_init_manager(struct usbpd_data *pd_data)
@ -860,11 +1443,13 @@ int usbpd_init_manager(struct usbpd_data *pd_data)
fp_select_pdo = s2mu004_select_pdo;
#endif
#endif
mutex_init(&manager->vdm_mutex);
manager->pd_data = pd_data;
manager->power_role_swap = true;
manager->data_role_swap = true;
manager->vconn_source_swap = true;
manager->alt_sended = 0;
manager->vdm_en = 0;
manager->acc_type = 0;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
@ -872,11 +1457,22 @@ int usbpd_init_manager(struct usbpd_data *pd_data)
manager->SVID_0 = 0;
manager->SVID_1 = 0;
manager->Standard_Vendor_ID = 0;
init_completion(&manager->uvdm_out_wait);
init_completion(&manager->uvdm_in_wait);
usbpd_manager_register_switch_device(1);
init_source_cap_data(manager);
init_sink_cap_data(manager);
INIT_DELAYED_WORK(&manager->acc_detach_handler, usbpd_manager_acc_detach_handler);
INIT_DELAYED_WORK(&manager->select_pdo_handler, usbpd_manager_select_pdo_handler);
INIT_DELAYED_WORK(&manager->start_discover_msg_handler,
usbpd_manager_start_discover_msg_handler);
ret = ccic_misc_init();
if (ret) {
pr_info("ccic misc register is failed, error %d\n", ret);
}
pr_info("%s done\n", __func__);
return ret;
}

100
drivers/ccic/usbpd_policy.c
View File

@ -28,8 +28,8 @@
} while (0);
#define CHECK_CMD(pd, event, ret) do {\
if (pd->manager.cmd == event) {\
pd->manager.cmd = 0; \
if (pd->manager.cmd & event) {\
pd->manager.cmd &= ~event; \
return ret;\
} \
} while (0);
@ -202,6 +202,7 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
CHECK_MSG(pd_data, VDM_ATTENTION, PE_DFP_VDM_Attention_Request);
CHECK_MSG(pd_data, VDM_DP_STATUS_UPDATE, PE_UFP_VDM_Evaluate_Status);
CHECK_MSG(pd_data, VDM_DP_CONFIGURE, PE_UFP_VDM_Evaluate_Configure);
CHECK_MSG(pd_data, UVDM_MSG, PE_DFP_UVDM_Receive_Message);
CHECK_CMD(pd_data, MANAGER_REQ_GET_SNKCAP, PE_SRC_Get_Sink_Cap);
CHECK_CMD(pd_data, MANAGER_REQ_GOTOMIN, PE_SRC_Transition_Supply);
@ -209,6 +210,8 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
CHECK_CMD(pd_data, MANAGER_REQ_PR_SWAP, PE_PRS_SRC_SNK_Send_Swap);
CHECK_CMD(pd_data, MANAGER_REQ_DR_SWAP, PE_DRS_Evaluate_Send_Port);
CHECK_CMD(pd_data, MANAGER_REQ_VCONN_SWAP, PE_VCS_Send_Swap);
CHECK_CMD(pd_data, MANAGER_REQ_UVDM_SEND_MESSAGE,
PE_DFP_UVDM_Send_Message);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_IDENTITY, PE_DFP_VDM_Identity_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_SVID, PE_DFP_VDM_SVIDs_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_MODE, PE_DFP_VDM_Modes_Request);
@ -225,12 +228,8 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
*/
pd_data->phy_ops.get_data_role(pd_data, &data_role);
if (data_role == USBPD_DFP) {
if (usbpd_manager_vdm_request_enabled(pd_data)) {
msleep(tDiscoverIdentity);
return PE_DFP_VDM_Identity_Request;
}
}
if (data_role == USBPD_DFP)
usbpd_manager_vdm_request_enabled(pd_data);
return PE_SRC_Ready;
}
@ -393,6 +392,7 @@ policy_state usbpd_policy_src_send_soft_reset(struct policy_data *policy)
policy_state usbpd_policy_src_soft_reset(struct policy_data *policy)
{
#if 0
struct usbpd_data *pd_data = policy_to_usbpd(policy);
if (usbpd_send_ctrl_msg(pd_data, &policy->tx_msg_header,
@ -400,6 +400,8 @@ policy_state usbpd_policy_src_soft_reset(struct policy_data *policy)
return PE_SRC_Send_Capabilities;
else
return PE_SRC_Hard_Reset;
#endif
return PE_SRC_Send_Capabilities;
}
policy_state usbpd_policy_snk_startup(struct policy_data *policy)
@ -551,6 +553,7 @@ policy_state usbpd_policy_snk_ready(struct policy_data *policy)
CHECK_MSG(pd_data, VDM_ATTENTION, PE_DFP_VDM_Attention_Request);
CHECK_MSG(pd_data, VDM_DP_STATUS_UPDATE, PE_UFP_VDM_Evaluate_Status);
CHECK_MSG(pd_data, VDM_DP_CONFIGURE, PE_UFP_VDM_Evaluate_Configure);
CHECK_MSG(pd_data, UVDM_MSG, PE_DFP_UVDM_Receive_Message);
CHECK_CMD(pd_data, MANAGER_REQ_NEW_POWER_SRC, PE_SNK_Select_Capability);
CHECK_CMD(pd_data, MANAGER_REQ_PR_SWAP, PE_PRS_SNK_SRC_Send_Swap);
@ -563,15 +566,12 @@ policy_state usbpd_policy_snk_ready(struct policy_data *policy)
CHECK_CMD(pd_data, MANAGER_REQ_VDM_ENTER_MODE, PE_DFP_VDM_Mode_Entry_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_STATUS_UPDATE, PE_DFP_VDM_Status_Update);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DisplayPort_Configure, PE_DFP_VDM_DisplayPort_Configure);
CHECK_CMD(pd_data, MANAGER_REQ_UVDM_SEND_MESSAGE,PE_DFP_UVDM_Send_Message);
pd_data->phy_ops.get_data_role(pd_data, &data_role);
if (data_role == USBPD_DFP) {
if (usbpd_manager_vdm_request_enabled(pd_data)) {
msleep(tDiscoverIdentity);
return PE_DFP_VDM_Identity_Request;
}
}
if (data_role == USBPD_DFP)
usbpd_manager_vdm_request_enabled(pd_data);
return PE_SNK_Ready;
}
@ -642,6 +642,7 @@ policy_state usbpd_policy_snk_get_source_cap(struct policy_data *policy)
policy_state usbpd_policy_snk_soft_reset(struct policy_data *policy)
{
#if 0
struct usbpd_data *pd_data = policy_to_usbpd(policy);
if (usbpd_send_ctrl_msg(pd_data, &policy->tx_msg_header,
@ -649,6 +650,8 @@ policy_state usbpd_policy_snk_soft_reset(struct policy_data *policy)
return PE_SNK_Wait_for_Capabilities;
else
return PE_SNK_Hard_Reset;
#endif
return PE_SNK_Wait_for_Capabilities;
}
policy_state usbpd_policy_drs_evaluate_port(struct policy_data *policy)
@ -1695,9 +1698,17 @@ policy_state usbpd_policy_ufp_vdm_attention_request(struct policy_data *policy)
policy_state usbpd_policy_ufp_vdm_evaluate_status(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
pd_data->phy_ops.get_power_role(pd_data, &power_role);
if (power_role == USBPD_SINK)
return PE_SNK_Ready;
else
return PE_SRC_Ready;
/* Todo
check DPM evaluate request to inform status
*/
@ -1708,7 +1719,6 @@ policy_state usbpd_policy_ufp_vdm_evaluate_status(struct policy_data *policy)
else
return PE_UFP_VDM_Mode_Entry_NAK;
*/
return PE_UFP_VDM_Evaluate_Status;
}
policy_state usbpd_policy_ufp_vdm_status_ack(struct policy_data *policy)
@ -1776,9 +1786,17 @@ policy_state usbpd_policy_ufp_vdm_status_nak(struct policy_data *policy)
policy_state usbpd_policy_ufp_vdm_evaluate_configure(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
pd_data->phy_ops.get_power_role(pd_data, &power_role);
if (power_role == USBPD_SINK)
return PE_SNK_Ready;
else
return PE_SRC_Ready;
/* Todo
check DPM evaluate request to inform status
*/
@ -1789,7 +1807,6 @@ policy_state usbpd_policy_ufp_vdm_evaluate_configure(struct policy_data *policy)
else
return PE_UFP_VDM_Mode_Entry_NAK;
*/
return PE_UFP_VDM_Evaluate_Configure;
}
policy_state usbpd_policy_ufp_vdm_configure_ack(struct policy_data *policy)
@ -1987,6 +2004,7 @@ policy_state usbpd_policy_dfp_vdm_svids_naked(struct policy_data *policy)
policy_state usbpd_policy_dfp_vdm_modes_request(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
struct usbpd_manager_data *manager = &pd_data->manager;
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
@ -1998,7 +2016,7 @@ policy_state usbpd_policy_dfp_vdm_modes_request(struct policy_data *policy)
policy->tx_msg_header.port_power_role = power_role;
policy->tx_msg_header.num_data_objs = 1;
policy->tx_data_obj[0].structured_vdm.svid = PD_SID_1;
policy->tx_data_obj[0].structured_vdm.svid = manager->SVID_0;
policy->tx_data_obj[0].structured_vdm.vdm_type = Structured_VDM;
policy->tx_data_obj[0].structured_vdm.version = 0;
policy->tx_data_obj[0].structured_vdm.obj_pos = 1;
@ -2041,6 +2059,7 @@ policy_state usbpd_policy_dfp_vdm_modes_naked(struct policy_data *policy)
policy_state usbpd_policy_dfp_vdm_entry_request(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
struct usbpd_manager_data *manager = &pd_data->manager;
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
@ -2053,7 +2072,7 @@ policy_state usbpd_policy_dfp_vdm_entry_request(struct policy_data *policy)
policy->tx_msg_header.num_data_objs = 1;
policy->tx_data_obj[0].object = 0;
policy->tx_data_obj[0].structured_vdm.svid = PD_SID_1;
policy->tx_data_obj[0].structured_vdm.svid = manager->SVID_0;
policy->tx_data_obj[0].structured_vdm.vdm_type = Structured_VDM;
policy->tx_data_obj[0].structured_vdm.version = 0;
policy->tx_data_obj[0].structured_vdm.obj_pos = 1;/* Todo select which_mode */
@ -2288,6 +2307,43 @@ policy_state usbpd_policy_dfp_vdm_displayport_configure_naked(struct policy_data
return usbpd_policy_dfp_vdm_response(policy, MANAGER_DisplayPort_Configure_NACKED);
}
policy_state usbpd_policy_dfp_uvdm_send_message(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
struct usbpd_manager_data *manager = &pd_data->manager;
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
pd_data->phy_ops.set_check_msg_pass(pd_data, CHECK_MSG_PASS);
usbpd_send_msg(pd_data, &manager->uvdm_msg_header, manager->uvdm_data_obj);
pd_data->phy_ops.get_power_role(pd_data, &power_role);
if (power_role == USBPD_SOURCE)
return PE_SRC_Ready;
else
return PE_SNK_Ready;
}
policy_state usbpd_policy_dfp_uvdm_receive_message(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
usbpd_manager_inform_event(pd_data, MANAGER_UVDM_RECEIVE_MESSAGE);
pd_data->phy_ops.get_power_role(pd_data, &power_role);
if (power_role == USBPD_SOURCE)
return PE_SRC_Ready;
else
return PE_SNK_Ready;
}
policy_state usbpd_error_recovery(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
@ -2660,7 +2716,12 @@ void usbpd_policy_work(struct work_struct *work)
case PE_DFP_VDM_DisplayPort_Configure_NAKed:
next_state = usbpd_policy_dfp_vdm_displayport_configure_naked(policy);
break;
case PE_DFP_UVDM_Send_Message:
next_state = usbpd_policy_dfp_uvdm_send_message(policy);
break;
case PE_DFP_UVDM_Receive_Message:
next_state = usbpd_policy_dfp_uvdm_receive_message(policy);
break;
case Error_Recovery:
next_state = usbpd_error_recovery(policy);
store_usblog_notify(NOTIFY_FUNCSTATE, (void *)&next_state, NULL);
@ -2703,6 +2764,7 @@ void usbpd_policy_work(struct work_struct *work)
}
break;
}
dev_info(pd_data->dev, "%s saved state %x next_state %x \n", __func__, saved_state, next_state);
} while (saved_state != next_state);
policy->state = next_state;

1
drivers/net/ethernet/broadcom/Makefile
View File

@ -9,6 +9,7 @@ obj-$(CONFIG_BNX2) += bnx2.o
obj-$(CONFIG_CNIC) += cnic.o
obj-$(CONFIG_BNX2X) += bnx2x/
obj-$(CONFIG_SB1250_MAC) += sb1250-mac.o
obj-$(CONFIG_TIGON3) += tg3.o
obj-$(CONFIG_BGMAC) += bgmac.o
obj-$(CONFIG_SYSTEMPORT) += bcmsysport.o
obj-$(CONFIG_BNXT) += bnxt/

52
include/linux/ccic/ccic_misc.h Normal file
View File

@ -0,0 +1,52 @@
/*
* driver/ccic/ccic_misc.h - S2MM005 CCIC MISC driver
*
* Copyright (C) 2017 Samsung Electronics
* Author: Wookwang Lee <wookwang.lee@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; If not, see <http://www.gnu.org/licenses/>.
*
*/
enum uvdm_data_type {
TYPE_SHORT = 0,
TYPE_LONG,
};
enum uvdm_direction_type {
DIR_OUT = 0,
DIR_IN,
};
struct uvdm_data {
unsigned short pid; /* Product ID */
char type; /* uvdm_data_type */
char dir; /* uvdm_direction_type */
unsigned int size; /* data size */
void __user *pData; /* data pointer */
};
struct ccic_misc_dev {
struct uvdm_data u_data;
atomic_t open_excl;
atomic_t ioctl_excl;
int (*uvdm_write)(void *data, int size);
int (*uvdm_read)(void *data, int size);
};
extern int ccic_misc_init(void);
extern ssize_t samsung_uvdm_out_request_message(void *data, size_t size);
extern int samsung_uvdm_in_request_message(void *data);
extern int samsung_uvdm_ready(void);
extern void samsung_uvdm_close(void);

55
include/linux/ccic/usbpd.h
View File

@ -33,7 +33,7 @@
#define tVDMWaitModeExit (50) /* 40~50 ms */
#define tDiscoverIdentity (50) /* 40~50 ms */
#define tSwapSourceStart (20) /* 20 ms */
#define tTypeCSinkWaitCap (600) /* 310~620 ms */
#define tTypeCSinkWaitCap (310) /* 310~620 ms */
/* Protocol States */
typedef enum {
@ -184,25 +184,31 @@ typedef enum {
PE_VCS_Send_Swap = 0xC6,
PE_VCS_Reject_VCONN_Swap = 0xC7,
/* UVDM Message */
PE_DFP_UVDM_Send_Message = 0xD0,
PE_DFP_UVDM_Receive_Message = 0xD1,
Error_Recovery = 0xFF
} policy_state;
typedef enum usbpd_manager_command {
MANAGER_REQ_GET_SNKCAP = 1,
MANAGER_REQ_GOTOMIN = 2,
MANAGER_REQ_SRCCAP_CHANGE = 3,
MANAGER_REQ_PR_SWAP = 4,
MANAGER_REQ_DR_SWAP = 5,
MANAGER_REQ_VCONN_SWAP = 6,
MANAGER_REQ_VDM_DISCOVER_IDENTITY = 7,
MANAGER_REQ_VDM_DISCOVER_SVID = 8,
MANAGER_REQ_VDM_DISCOVER_MODE = 9,
MANAGER_REQ_VDM_ENTER_MODE = 10,
MANAGER_REQ_VDM_EXIT_MODE = 11,
MANAGER_REQ_VDM_ATTENTION = 12,
MANAGER_REQ_VDM_STATUS_UPDATE = 13,
MANAGER_REQ_VDM_DisplayPort_Configure = 14,
MANAGER_REQ_NEW_POWER_SRC = 15,
MANAGER_REQ_GOTOMIN = 1 << 2,
MANAGER_REQ_SRCCAP_CHANGE = 1 << 3,
MANAGER_REQ_PR_SWAP = 1 << 4,
MANAGER_REQ_DR_SWAP = 1 << 5,
MANAGER_REQ_VCONN_SWAP = 1 << 6,
MANAGER_REQ_VDM_DISCOVER_IDENTITY = 1 << 7,
MANAGER_REQ_VDM_DISCOVER_SVID = 1 << 8,
MANAGER_REQ_VDM_DISCOVER_MODE = 1 << 9,
MANAGER_REQ_VDM_ENTER_MODE = 1 << 10,
MANAGER_REQ_VDM_EXIT_MODE = 1 << 11,
MANAGER_REQ_VDM_ATTENTION = 1 << 12,
MANAGER_REQ_VDM_STATUS_UPDATE = 1 << 13,
MANAGER_REQ_VDM_DisplayPort_Configure = 1 << 14,
MANAGER_REQ_NEW_POWER_SRC = 1 << 15,
MANAGER_REQ_UVDM_SEND_MESSAGE = 1 << 16,
MANAGER_REQ_UVDM_RECEIVE_MESSAGE = 1 << 17,
} usbpd_manager_command_type;
typedef enum usbpd_manager_event {
@ -222,6 +228,9 @@ typedef enum usbpd_manager_event {
MANAGER_DisplayPort_Configure_ACKED = 13,
MANAGER_DisplayPort_Configure_NACKED = 14,
MANAGER_NEW_POWER_SRC = 15,
MANAGER_UVDM_SEND_MESSAGE = 16,
MANAGER_UVDM_RECEIVE_MESSAGE = 17,
MANAGER_START_DISCOVER_IDENTITY = 18,
} usbpd_manager_event_type;
enum usbpd_msg_status {
@ -253,7 +262,7 @@ enum usbpd_msg_status {
PLUG_ATTACH = 1<<25,
MSG_HARDRESET = 1<<26,
CC_DETECT = 1<<27,
PLUG_WAKEUP = 1<<28,
UVDM_MSG = 1<<28,
MSG_PASS = 1<<29,
MSG_RID = 1<<30,
MSG_NONE = 1<<31,
@ -355,7 +364,11 @@ struct usbpd_manager_data {
usbpd_manager_command_type cmd; /* request to policy engine */
usbpd_manager_event_type event; /* policy engine infromed */
msg_header_type uvdm_msg_header;
data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
int alt_sended;
int vdm_en;
/* request */
int max_power;
int op_power;
@ -386,6 +399,12 @@ struct usbpd_manager_data {
bool vconn_source_swap;
bool vbus_short;
bool is_samsung_accessory_enter_mode;
bool uvdm_first_req;
bool uvdm_dir;
struct completion uvdm_out_wait;
struct completion uvdm_in_wait;
uint16_t Vendor_ID;
uint16_t Product_ID;
uint16_t Device_Version;
@ -394,8 +413,12 @@ struct usbpd_manager_data {
uint16_t SVID_1;
uint16_t Standard_Vendor_ID;
struct mutex vdm_mutex;
struct usbpd_data *pd_data;
struct delayed_work acc_detach_handler;
struct delayed_work select_pdo_handler;
struct delayed_work start_discover_msg_handler;
muic_attached_dev_t attached_dev;
};

2
include/linux/ccic/usbpd_ext.h
View File

@ -55,7 +55,7 @@ enum {
#define SEC_UVDM_RESPONDER_ACK 0x1
#define SEC_UVDM_RESPONDER_NAK 0x2
#define SEC_UVDM_RESPONDER_BUSY 0x3
#define SEC_UVDM_UNSTRUCTURED_VDM 0x0
#define SEC_UVDM_UNSTRUCTURED_VDM 0x4
/*For DP Pin Assignment */
#define DP_PIN_ASSIGNMENT_NODE 0x00000000

83
include/linux/ccic/usbpd_msg.h
View File

@ -6,6 +6,26 @@
#define PD_SID (0xFF00)
#define PD_SID_1 (0xFF01)
#define MAX_INPUT_DATA (255)
#define SEC_UVDM_ALIGN (4)
#define SEC_UVDM_WAIT_MS (5000)
#define SEC_UVDM_MAXDATA_FIRST (12)
#define SEC_UVDM_MAXDATA_NORMAL (16)
#define SEC_UVDM_CHECKSUM_COUNT (20)
enum uvdm_res_type {
RES_INIT = 0,
RES_ACK,
RES_NAK,
RES_BUSY,
};
enum uvdm_rx_type {
RX_ACK = 0,
RX_NAK,
RX_BUSY,
};
typedef union {
u16 word;
u8 byte[2];
@ -170,6 +190,69 @@ typedef union {
} vdm_svid;
} data_obj_type;
typedef union {
u32 object;
u16 word[2];
u8 byte[4];
struct {
unsigned vendor_defined:15;
unsigned vdm_type:1;
unsigned vendor_id:16;
};
} uvdm_header;
typedef union {
u32 object;
u16 word[2];
u8 byte[4];
struct{
unsigned data:8;
unsigned total_set_num:4;
unsigned direction:1;
unsigned cmd_type:2;
unsigned data_type:1;
unsigned pid:16;
};
} s_uvdm_header;
typedef union {
u32 object;
u16 word[2];
u8 byte[4];
struct{
unsigned cur_size:8;
unsigned total_size:8;
unsigned reserved:12;
unsigned order_cur_set:4;
};
} s_tx_header;
typedef union {
u32 object;
u16 word[2];
u8 byte[4];
struct{
unsigned checksum:16;
unsigned reserved:16;
};
} s_tx_tailer;
typedef union {
u32 object;
u16 word[2];
u8 byte[4];
struct{
unsigned reserved:18;
unsigned result_value:2;
unsigned rcv_data_size:8;
unsigned order_cur_set:4;
};
} s_rx_header;
typedef enum {
POWER_TYPE_FIXED = 0,
POWER_TYPE_BATTERY,