diff --git a/Makefile b/Makefile
index 53d7c351092f..0e5c5d67d07b 100644
--- a/Makefile
+++ b/Makefile
@@ -256,6 +256,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/x86/ -e s/x86_64/x86/ \
# "make" in the configured kernel build directory always uses that.
# Default value for CROSS_COMPILE is not to prefix executables
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
+export KBUILD_BUILDHOST := $(SUBARCH)
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%)
diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
index 7fa235b364a4..b78896b76686 100644
--- a/arch/arm64/boot/dts/exynos/Makefile
+++ b/arch/arm64/boot/dts/exynos/Makefile
@@ -1,3 +1,13 @@
+dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN) := \
+ exynos7885-jackpotlte_can_open_00.dtb \
+ exynos7885-jackpotlte_can_open_01.dtb \
+ exynos7885-jackpotlte_can_open_02.dtb \
+ exynos7885-jackpotlte_can_open_03.dtb \
+ exynos7885-jackpotlte_can_open_04.dtb \
+ exynos7885-jackpotlte_can_open_05.dtb \
+ exynos7885-jackpotlte_can_open_06.dtb \
+ exynos7885-jackpotlte_can_open_07.dtb
+
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN) := \
exynos7885-jackpotlte_eur_open_00.dtb \
exynos7885-jackpotlte_eur_open_01.dtb \
@@ -6,7 +16,10 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN) := \
exynos7885-jackpotlte_eur_open_04.dtb \
exynos7885-jackpotlte_eur_open_05.dtb \
exynos7885-jackpotlte_eur_open_06.dtb \
- exynos7885-jackpotlte_eur_open_07.dtb
+ exynos7885-jackpotlte_eur_open_07.dtb
+
+dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM) := \
+ exynos7885-jackpotlte_jpn_dcm_00.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR) := \
exynos7885-jackpotlte_kor_00.dtb \
@@ -16,7 +29,7 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR) := \
exynos7885-jackpotlte_kor_04.dtb \
exynos7885-jackpotlte_kor_05.dtb \
exynos7885-jackpotlte_kor_06.dtb \
- exynos7885-jackpotlte_kor_07.dtb
+ exynos7885-jackpotlte_kor_07.dtb
dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN) := \
exynos7885-jackpot2lte_eur_open_00.dtb \
@@ -26,7 +39,7 @@ dtb-$(CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN) := \
exynos7885-jackpot2lte_eur_open_04.dtb \
exynos7885-jackpot2lte_eur_open_05.dtb \
exynos7885-jackpot2lte_eur_open_06.dtb \
- exynos7885-jackpot2lte_eur_open_07.dtb
+ exynos7885-jackpot2lte_eur_open_07.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/exynos/battery_data_jackpotlte_can.dtsi b/arch/arm64/boot/dts/exynos/battery_data_jackpotlte_can.dtsi
new file mode 100755
index 000000000000..f042228f8413
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/battery_data_jackpotlte_can.dtsi
@@ -0,0 +1,89 @@
+/*
+ * Jackpot Battery parameters device tree file for board IDs 04 and higher
+ *
+ * Copyright (C) 2017 Samsung Electronics, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+
+/ {
+ battery {
+
+ battery,standard_curr = <2050>;
+ };
+
+ cable-info {
+ default_input_current = <1800>;
+ default_charging_current = <2000>;
+ full_check_current_1st = <300>;
+ full_check_current_2nd = <150>;
+
+ current_group_1 {
+ cable_number = <1 4 19 21 22 23 30>;
+ input_current = <500>;
+ charging_current = <500>;
+ };
+ current_group_2 {
+ cable_number = <2 25>;
+ input_current = <1000>;
+ charging_current = <1000>;
+ };
+ current_group_3 {
+ cable_number = <5>;
+ input_current = <1500>;
+ charging_current = <1500>;
+ };
+ current_group_4 {
+ cable_number = <6 7 8>;
+ input_current = <1650>;
+ charging_current = <2050>;
+ };
+ current_group_5 {
+ cable_number = <9>;
+ input_current = <1650>;
+ charging_current = <2050>;
+ };
+ current_group_6 {
+ cable_number = <10 12 14 15 27>;
+ input_current = <900>;
+ charging_current = <1200>;
+ };
+ current_group_7 {
+ cable_number = <13>;
+ input_current = <700>;
+ charging_current = <1200>;
+ };
+ current_group_8 {
+ cable_number = <24>;
+ input_current = <1000>;
+ charging_current = <450>;
+ };
+ current_group_9 {
+ cable_number = <26>;
+ input_current = <2000>;
+ charging_current = <1800>;
+ };
+ current_group_10 {
+ cable_number = <11 16 28>;
+ input_current = <650>;
+ charging_current = <1200>;
+ };
+ current_group_11 {
+ cable_number = <29>;
+ input_current = <500>;
+ charging_current = <1200>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_00.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_00.dts
new file mode 100755
index 000000000000..363b966db5f2
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_00.dts
@@ -0,0 +1,144 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
+#include "exynos7885-jackpotlte_mst_00.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev00 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <0>;
+ model_info-hw_rev_end = <0>;
+ compatible = "samsung, JACKPOTLTE CAN rev00", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <6>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
+ gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
+ };
+
+ /* sec-wf-thermistor */
+ sec_thermistor@6 {
+ status = "disabled";
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <2>;
+ };
+
+ pinctrl@13430000 {
+ motor: motor {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ motor_en_high: motor_en_high {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13890000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ zh915@7F {
+ compatible = "zh915";
+ reg = <0x7F>;
+ pinctrl-names ="default", "motor_en_high";
+ pinctrl-0 = <&motor>;
+ pinctrl-1 = <&motor_en_high>;
+ status = "okay";
+ mot_boost_en = <&gpf3 4 0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_01.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_01.dts
new file mode 100755
index 000000000000..82e2cfd2ac22
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_01.dts
@@ -0,0 +1,144 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
+#include "exynos7885-jackpotlte_mst_00.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev01 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <1>;
+ model_info-hw_rev_end = <1>;
+ compatible = "samsung, JACKPOTLTE CAN rev01", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <6>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
+ gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
+ };
+
+ /* sec-wf-thermistor */
+ sec_thermistor@6 {
+ status = "disabled";
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <2>;
+ };
+
+ pinctrl@13430000 {
+ motor: motor {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ motor_en_high: motor_en_high {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13890000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ zh915@7F {
+ compatible = "zh915";
+ reg = <0x7F>;
+ pinctrl-names ="default", "motor_en_high";
+ pinctrl-0 = <&motor>;
+ pinctrl-1 = <&motor_en_high>;
+ status = "okay";
+ mot_boost_en = <&gpf3 4 0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_02.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_02.dts
new file mode 100755
index 000000000000..abc01e5dec9d
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_02.dts
@@ -0,0 +1,173 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_00.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev02 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <2>;
+ model_info-hw_rev_end = <2>;
+ compatible = "samsung, JACKPOTLTE CAN rev02", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
+ gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
+ };
+
+ /* sec-wf-thermistor */
+ sec_thermistor@6 {
+ status = "disabled";
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <2>;
+ };
+
+ pinctrl@13430000 {
+ motor: motor {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ motor_en_high: motor_en_high {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13890000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ zh915@7F {
+ compatible = "zh915";
+ reg = <0x7F>;
+ pinctrl-names ="default", "motor_en_high";
+ pinctrl-0 = <&motor>;
+ pinctrl-1 = <&motor_en_high>;
+ status = "okay";
+ mot_boost_en = <&gpf3 4 0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_03.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_03.dts
new file mode 100755
index 000000000000..f923a36a5233
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_03.dts
@@ -0,0 +1,173 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_03.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev04 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <3>;
+ model_info-hw_rev_end = <3>;
+ compatible = "samsung, JACKPOTLTE CAN rev04", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
+ gpio_reset = <&gpq0 1 0x1>; /* sensor reset - jackpot hw_rev = 000'b ~ 011'b */
+ };
+
+ /* sec-wf-thermistor */
+ sec_thermistor@6 {
+ status = "disabled";
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <2>;
+ };
+
+ pinctrl@13430000 {
+ motor: motor {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ motor_en_high: motor_en_high {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13890000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ zh915@7F {
+ compatible = "zh915";
+ reg = <0x7F>;
+ pinctrl-names ="default", "motor_en_high";
+ pinctrl-0 = <&motor>;
+ pinctrl-1 = <&motor_en_high>;
+ status = "okay";
+ mot_boost_en = <&gpf3 4 0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_04.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_04.dts
new file mode 100755
index 000000000000..d6ec66d9e408
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_04.dts
@@ -0,0 +1,164 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_04.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev05 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <4>;
+ model_info-hw_rev_end = <4>;
+ compatible = "samsung, JACKPOTLTE CAN rev05", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <2>;
+ };
+
+ pinctrl@13430000 {
+ motor: motor {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ motor_en_high: motor_en_high {
+ samsung,pins = "gpf3-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-val = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13890000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ zh915@7F {
+ compatible = "zh915";
+ reg = <0x7F>;
+ pinctrl-names ="default", "motor_en_high";
+ pinctrl-0 = <&motor>;
+ pinctrl-1 = <&motor_en_high>;
+ status = "okay";
+ mot_boost_en = <&gpf3 4 0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_05.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_05.dts
new file mode 100755
index 000000000000..64fb9547c27b
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_05.dts
@@ -0,0 +1,151 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_05.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev05 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <5>;
+ model_info-hw_rev_end = <5>;
+ compatible = "samsung, JACKPOTLTE CAN rev05", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <1>;
+ };
+
+ pinctrl@139B0000 {
+ motor_pwm: motor_pwm {
+ samsung,pins = "gpg0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13830000 {
+ s2mu004-haptic@3A {
+ compatible = "sec,s2mu004-haptic";
+ reg = <0x3A>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&motor_pwm>;
+
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_06.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_06.dts
new file mode 100755
index 000000000000..d16c444d942a
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_06.dts
@@ -0,0 +1,168 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_06.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev06 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <6>;
+ model_info-hw_rev_end = <6>;
+ compatible = "samsung, JACKPOTLTE CAN rev06", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <1>;
+ };
+
+ pinctrl@139B0000 {
+ motor_pwm: motor_pwm {
+ samsung,pins = "gpg0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13830000 {
+ s2mu004-haptic@3A {
+ compatible = "sec,s2mu004-haptic";
+ reg = <0x3A>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&motor_pwm>;
+
+ };
+ };
+
+ leds_ktd2692 {
+ compatible = "ktd2692";
+ flash_control = <&gpg1 2 0x1>;
+ max_current = <1360>; /* (IMax) */
+ flash_current = <1200>; /* (n/16)xIMax (1<=n<=16) */
+ movie_current = <175>; /* (n/16)*IMax/3 (1<=n<=16) */
+ factory_current = <175>; /* (n/16)xIMax/3 (1<=n<=16) */
+ torch_current = <75>; /* (n/16)xIMax/3 (1<=n<=16) */
+ torch_table_enable = <1>;
+ torch_table = <1 2 2 3 3 4 4 4 5 5>;
+ status = "okay";
+ pinctrl-names ="default","host","is";
+ pinctrl-0 = <&fimc_is_flash_is>;
+ pinctrl-1 = <&fimc_is_flash_host>;
+ pinctrl-2 = <&fimc_is_flash_is>;
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_07.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_07.dts
new file mode 100755
index 000000000000..efd56b5a8a36
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_07.dts
@@ -0,0 +1,151 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_can_open_gpio_07.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "battery_data_jackpotlte_can.dtsi"
+
+/ {
+ model = "Samsung JACKPOTLTE CAN rev07 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <7>;
+ model_info-hw_rev_end = <255>;
+ compatible = "samsung, JACKPOTLTE CAN rev07", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio &sim1_det_gpio>;
+ mif,num_of_usim_det = <2>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ mif,usim-det1-gpio = <&gpa2 5 0>;
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <1>;
+ };
+
+ pinctrl@139B0000 {
+ motor_pwm: motor_pwm {
+ samsung,pins = "gpg0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13830000 {
+ s2mu004-haptic@3A {
+ compatible = "sec,s2mu004-haptic";
+ reg = <0x3A>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&motor_pwm>;
+
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ abov@20 {
+ abov,firmware_name = "abov/a96t326_a5y18_can.fw";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_00.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_00.dtsi
new file mode 100755
index 000000000000..d467960c85c8
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_00.dtsi
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep2>;
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
+ PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
+ PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_03.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_03.dtsi
new file mode 100755
index 000000000000..d467960c85c8
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_03.dtsi
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep2>;
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
+ PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
+ PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_04.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_04.dtsi
new file mode 100755
index 000000000000..67c7d2da7952
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_04.dtsi
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpq0-1, DOWN, LV1); /* NC */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep2>;
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, OUT0, DOWN); /* MOTOR_BOOST_EN */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_OUT_SET(gpg0-1, 0, LV1); /* MOT_PWM */
+ PIN_IN(gpg0-2, DOWN, LV1); /* FM_LNA_EN */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, OUT0, NONE); /*MOT_PWM*/
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, PREV, UP); /* PMIC_I2C_SDA */
+ PIN_SLP(gpp4-5, PREV, UP); /* PMIC_I2C_SDA */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_05.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_05.dtsi
new file mode 100755
index 000000000000..f9681a44f96b
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_05.dtsi
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpq0-1, DOWN, LV1); /* NC */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial2>;
+ pinctrl-1 = <&sleep2>;
+ initial2: initial-state {
+ PIN_IN(gpf3-4, DOWN, LV1); /* NC */
+ };
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_IN(gpp4-4, DOWN, LV1); /* NC */
+ PIN_IN(gpp4-5, DOWN, LV1); /* NC */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
+
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
+ PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_06.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_06.dtsi
new file mode 100755
index 000000000000..f9681a44f96b
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_06.dtsi
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpq0-1, DOWN, LV1); /* NC */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial2>;
+ pinctrl-1 = <&sleep2>;
+ initial2: initial-state {
+ PIN_IN(gpf3-4, DOWN, LV1); /* NC */
+ };
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_IN(gpp4-4, DOWN, LV1); /* NC */
+ PIN_IN(gpp4-5, DOWN, LV1); /* NC */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
+
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
+ PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_07.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_07.dtsi
new file mode 100755
index 000000000000..f9681a44f96b
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_can_open_gpio_07.dtsi
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpq0-1, DOWN, LV1); /* NC */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial2>;
+ pinctrl-1 = <&sleep2>;
+ initial2: initial-state {
+ PIN_IN(gpf3-4, DOWN, LV1); /* NC */
+ };
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_IN(gpp4-4, DOWN, LV1); /* NC */
+ PIN_IN(gpp4-5, DOWN, LV1); /* NC */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_IN(gpg2-4, DOWN, LV1); /* NC(TDMB_PWR_EN) */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ PIN_IN(gpc2-4, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-5, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-6, DOWN, LV1); /* NC(TDMB) */
+ PIN_IN(gpc2-7, DOWN, LV1); /* NC(TDMB) */
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
+
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
+ PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, PREV, NONE); /* ESE_1P8_EN */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-4, INPUT, DOWN); /* NC(TDMB_PWR_EN) */
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_LDO_1P8 */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+
+ PIN_SLP(gpc2-4, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-5, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-6, INPUT, DOWN); /* NC(TDMB) */
+ PIN_SLP(gpc2-7, INPUT, DOWN); /* NC(TDMB) */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn-isdbt-00.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn-isdbt-00.dtsi
new file mode 100755
index 000000000000..3de8ffdfe762
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn-isdbt-00.dtsi
@@ -0,0 +1,82 @@
+ /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/{
+ pinctrl@139B0000 {
+ spi3_idle: spi3-idle {
+ samsung,pins = "gpc2-5", "gpc2-4", "gpc2-7", "gpc2-6";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ };
+
+ spi3_cs_func: spi3-cs-func {
+ samsung,pins = "gpc2-6";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ spi_3: spi@13940000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <1>;
+
+ dma-mode;
+ dmas = <&pdma0 25
+ &pdma0 24>;
+
+ status = "ok";
+ spi-clkoff-time = <100>;
+
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&spi3_bus &spi3_cs_func>;
+ pinctrl-1 = <&spi3_idle>;
+
+ isdbt-spi@0 {
+ compatible = "isdbt_spi_comp";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ controller-data {
+ samsung,spi-feedback-delay = <1>;
+ };
+ };
+ };
+
+ pinctrl@11CB0000 {
+ isdbt_int_init: isdbt-int-init {
+ samsung,pins = "gpa2-5";
+ samsung,pin-pud = <3>;
+ };
+ isdbt_int_sleep: isdbt-int-sleep {
+ samsung,pins = "gpa2-5";
+ samsung,pin-pud = <1>;
+ };
+ };
+
+ isdbt_fc8300_data {
+ compatible = "isdb_fc8300_pdata";
+ isdbt,isdb-gpio-pwr-en = <&gpg2 4 0>;
+ isdbt,isdb-gpio-irq = <&gpa2 5 0x01>;
+ isdbt,isdb-gpio-spi_do = <&gpc2 5 0>;
+ isdbt,isdb-gpio-spi_di = <&gpc2 4 0>;
+ isdbt,isdb-gpio-spi_cs = <&gpc2 6 0>;
+ isdbt,isdb-gpio-spi_clk = <&gpc2 7 0>;
+ isdbt,isdb-bbm-xtal-freq = <24000>;
+
+ pinctrl-names = "isdbt_on", "isdbt_off";
+ pinctrl-0 = <&isdbt_int_init>;
+ pinctrl-1 = <&isdbt_int_sleep>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_common.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_common.dtsi
new file mode 100755
index 000000000000..705b877d8be8
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_common.dtsi
@@ -0,0 +1,2237 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos7885-rmem.dtsi"
+#include "exynos7885.dtsi"
+#include "exynos7885-display-lcd.dtsi"
+#include "modem-s327ap-sipc-pdata.dtsi"
+#include "battery_data_jackpotlte_common.dtsi"
+#include "exynos7885-jackpotlte_motor.dtsi"
+/ {
+ model = "Samsung Universal7885 board based on EXYNOS7885";
+ compatible = "samsung,exynos7885", "samsung,Universal7885";
+
+ ect {
+ parameter_address = <0x90000000>;
+ parameter_size = <0x19000>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x3DA00000>;
+ };
+
+ memory@C0000000 {
+ device_type = "memory";
+ reg = <0x0 0xC0000000 0x40000000>;
+ };
+
+ memory@880000000 {
+ device_type = "memory";
+ reg = <0x00000008 0x80000000 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "console=ram root=/dev/ram0 clk_ignore_unused androidboot.hardware=samsungexynos7885 androidboot.selinux=permissive ess_setup=0x86000000 androidboot.debug_level=0x4948";
+ linux,initrd-start = <0x84000000>;
+ linux,initrd-end = <0x840FFFFF>;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos7885-oscclk";
+ clock-frequency = <26000000>;
+ };
+ };
+
+ firmware {
+ android {
+ compatible = "android,firmware";
+ fstab {
+ compatible = "android,fstab";
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/platform/13500000.dwmmc0/by-name/SYSTEM";
+ type = "ext4";
+ mnt_flags = "ro";
+ fsmgr_flags = "wait,verify";
+ };
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/platform/13500000.dwmmc0/by-name/VENDOR";
+ type = "ext4";
+ mnt_flags = "ro";
+ fsmgr_flags = "wait,verify";
+ };
+ };
+ };
+ };
+
+ /* USI MODE SETTINGS
+
+ usi_mode = "hsi2c0" or "hsi2c1" or "spi" or "uart"
+ or "hsi2c0_hsi2c1" or "uart_hsi2c1"
+ */
+ usi_0: usi@10032000 {
+ usi_mode = "spi";
+ status = "okay";
+ };
+
+ usi_1: usi@10032004 {
+ usi_mode = "spi";
+ status = "okay";
+ };
+
+ usi_2: usi@10032008 {
+ usi_mode = "spi";
+ status = "okay";
+ };
+
+ serial_1: uart@13810000 {
+ status = "disabled";
+ };
+
+ fm@14840000 {
+ num-volume-level = <16>;
+ val-vol-level = <0 11 16 23 32 45 64
+ 90 128 181 256 362
+ 512 724 1024 1400>;
+ };
+
+ pinctrl@11CB0000 {
+ pmic_irq: pmic-irq {
+ samsung,pins = "gpa2-0";
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <3>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ /* Warm reset information from AP */
+ pm_wrsti: pm-wrsti {
+ samsung,pins = "gpg1-1";
+ samsung,pin-con-pdn = <3>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ /* SPI_FP */
+ spi1_bus_inactive: spi1-bus-inactive {
+ samsung,pins = "gpp6-0", "gpp6-1", "gpp6-3";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <2>;
+ };
+ spi1_miso_inactive: spi1-miso-inactive {
+ samsung,pins = "gpp6-2";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <2>;
+ };
+ spi1_clk: spi1-clk {
+ samsung,pins = "gpp6-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <2>;
+ };
+ spi1_cs: spi1-cs {
+ samsung,pins = "gpp6-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <2>;
+ };
+ spi1_miso: spi1-miso {
+ samsung,pins = "gpp6-2";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <2>;
+ };
+ spi1_mosi: spi1-mosi {
+ samsung,pins = "gpp6-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <2>;
+ };
+ };
+
+ but_zones: but_zones {
+ #list-but-cells = <3>;
+ };
+
+ speedy@11CE0000 {
+ status = "okay";
+ audio_codec_cod3035x: cod3035x@03 {
+ compatible = "codec,cod3035x";
+ reg = <0x03>;
+ i2c-speedy-address;
+ vdd-supply = <&l36_reg>;
+ pinctrl-names = "default";
+ mic-bias1-voltage = <3>;
+ mic-bias2-voltage = <1>;
+ mic-bias-ldo-voltage = <3>;
+ use-lassenA;
+ use-btn-adc-mode;
+ use-det-gdet-adc-mode = <1>;
+ jack-imp-tuning = <7>;
+ io-channels = <&exynos_adc 3>,<&exynos_adc 7>;
+ io-channel-names = "adc-ear","adc-gdet";
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+ but-zones-list = <&but_zones 226 0 376>,
+ <&but_zones 582 377 447>,
+ <&but_zones 115 448 627>,
+ <&but_zones 114 628 1161>;
+ mic-adc-range = <1404>;
+ btn-release-value = <1404>;
+ };
+
+ s2mpu08mfd@00 {
+ compatible = "samsung,s2mpu08mfd";
+ acpm-ipc-channel = <2>;
+ i2c-speedy-address;
+ s2mpu08,wakeup = "enabled";
+ s2mpu08,irq-gpio = <&gpa2 0 0>;
+ reg = <0x00>;
+ interrupts = <2 0 0>;
+ interrupt-parent = <&gpa2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq &pm_wrsti>;
+ /* RTC: wtsr/smpl */
+ wtsr_en = "enabled"; /* enable */
+ smpl_en = "enabled"; /* enable */
+ wtsr_timer_val = <3>; /* 1000ms */
+ smpl_timer_val = <0>; /* 100ms */
+ check_jigon = <0>; /* do not check jigon */
+ /* RTC: If it's first boot, reset rtc to 1/1/2017 12:00:00(Sun) */
+ init_time,sec = <0>;
+ init_time,min = <0>;
+ init_time,hour = <12>;
+ init_time,mday = <1>;
+ init_time,mon = <0>;
+ init_time,year = <117>;
+ init_time,wday = <0>;
+
+ samsung,codec-interrupt = <&audio_codec_cod3035x>;
+
+ regulators {
+ b1_reg: BUCK1 {
+ regulator-name = "vdd_mif";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <2>;
+ };
+
+ b2_reg: BUCK2 {
+ regulator-name = "vdd_cpucl0";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ b3_reg: BUCK3 {
+ regulator-name = "vdd_cpucl1_2";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ b4_reg: BUCK4 {
+ regulator-name = "vdd_int";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <2>;
+ };
+
+ b5_reg: BUCK5 {
+ regulator-name = "vdd_g3d";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ b6_reg: BUCK6 {
+ regulator-name = "vdd2_mem";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ b7_reg: BUCK7 {
+ regulator-name = "vdd_lldo";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ b8_reg: BUCK8 {
+ regulator-name = "vdd_mldo";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2100000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l1_reg: LDO1 {
+ regulator-name = "vdd_ldo1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l2_reg: LDO2 {
+ regulator-name = "vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3375000>;
+ regulator-ramp-delay = <12000>;
+ };
+
+ l3_reg: LDO3 {
+ regulator-name = "vdd_ldo3";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l4_reg: LDO4 {
+ regulator-name = "vdd_ldo4";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l5_reg: LDO5 {
+ regulator-name = "vdd_ldo5";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l6_reg: LDO6 {
+ regulator-name = "vdd_ldo6";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l7_reg: LDO7 {
+ regulator-name = "vdd_ldo7";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l8_reg: LDO8 {
+ regulator-name = "vdd_ldo8";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l9_reg: LDO9 {
+ regulator-name = "vdd_ldo9";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l10_reg: LDO10 {
+ regulator-name = "vdd_ldo10";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l11_reg: LDO11 {
+ regulator-name = "vdd_ldo11";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l12_reg: LDO12 {
+ regulator-name = "vdd_ldo12";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l13_reg: LDO13 {
+ regulator-name = "vdd_ldo13";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l14_reg: LDO14 {
+ regulator-name = "vdd_ldo14";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3375000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <1>;
+ };
+
+ l33_reg: LDO33 {
+ regulator-name = "vdd_ldo33";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l34_reg: LDO34 {
+ regulator-name = "vdd_ldo34";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3375000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l35_reg: LDO35 {
+ regulator-name = "vmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-ramp-delay = <12000>;
+ };
+
+ l36_reg: LDO36 {
+ regulator-name = "vdd_ldo36";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+
+ l37_reg: LDO37 {
+ regulator-name = "vdd_ldo37";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3375000>;
+ regulator-always-on;
+ regulator-ramp-delay = <12000>;
+ regulator-initial-mode = <3>;
+ };
+ };
+ };
+ };
+
+ sec_thermistor@0 {
+ compatible = "samsung,sec-ap-thermistor";
+ status = "okay";
+
+ adc_array = <235 308 378 395 467 568 603 648 698 764
+ 908 1066 1170 1242 1327 1430 1633 1830 2061 2282
+ 2409 2500 2584 2697 2880 3069 3213 3337 3447>;
+ temp_array = <900 850 800 750 700 650 620 600 580 550
+ 500 450 420 400 380 350 300 250 200 150
+ 120 100 80 50 0 (-50) (-100) (-150) (-200)>;
+ io-channels = <&exynos_adc 0>;
+ io-channel-names = "adc-ap-temp";
+ io-channel-ranges;
+ };
+
+ sec_thermistor@6 {
+ compatible = "samsung,sec-cf-thermistor";
+ status = "okay";
+
+ adc_array = <235 308 378 395 467 568 603 648 698 764
+ 908 1066 1170 1242 1327 1430 1633 1830 2061 2282
+ 2409 2500 2584 2697 2880 3069 3213 3337 3447>;
+ temp_array = <900 850 800 750 700 650 620 600 580 550
+ 500 450 420 400 380 350 300 250 200 150
+ 120 100 80 50 0 (-50) (-100) (-150) (-200)>;
+ io-channels = <&exynos_adc 6>;
+ io-channel-names = "adc-cf-temp";
+ io-channel-ranges;
+ };
+
+ exynos_rgt {
+ compatible = "samsung,exynos-rgt";
+ };
+
+ serial_2: uart@13820000 {
+ status = "okay";
+ };
+
+ pinctrl@11CB0000 {
+ dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq {
+ samsung,pins = "gpa0-7";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <3>;
+ };
+ };
+
+ dwmmc0@13500000 {
+ status = "okay";
+ num-slots = <1>;
+ broken-cd;
+ fixed_voltage;
+ supports-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ supports-8bit;
+ supports-cmd23;
+ supports-erase;
+ supports-hs400-enhanced-strobe;
+ card-init-hwacg-ctrl;
+ support-cmdq;
+ qos-dvfs-level = <100000>;
+ fifo-depth = <0x40>;
+ non-removable;
+ desc-size = <4>;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-txdt-crc-timer-fastlimit = <0x13>;
+ samsung,dw-mshc-txdt-crc-timer-initval = <0x15>;
+ samsung,dw-mshc-hs400-delay-line = <0x60>;
+ samsung,dw-mshc-sdr-timing = <3 0 4 0>;
+ samsung,dw-mshc-ddr-timing = <3 0 4 2>;
+ samsung,dw-mshc-hs200-timing = <3 0 3 0>;
+ samsung,dw-mshc-hs400-timing = <1 0 2 0>;
+ samsung,dw-mshc-hs400-ulp-timing = <3 0 2 0>;
+
+ num-ref-clks = <12>;
+ ciu_clkin = <25 50 50 25 50 100 200 50 50 200 200 200>;
+
+ /* Swapping clock drive strength */
+ clk-drive-number = <4>;
+ pinctrl-names = "default",
+ "fast-slew-rate-1x",
+ "fast-slew-rate-2x",
+ "fast-slew-rate-3x",
+ "fast-slew-rate-4x";
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_rdqs &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+ pinctrl-1 = <&sd0_clk_fast_slew_rate_1x>;
+ pinctrl-2 = <&sd0_clk_fast_slew_rate_2x>;
+ pinctrl-3 = <&sd0_clk_fast_slew_rate_3x>;
+ pinctrl-4 = <&sd0_clk_fast_slew_rate_4x>;
+ slot@0 {
+ reg = <0>;
+ bus-width = <8>;
+ };
+
+ };
+
+ dwmmc1@13510000 {
+ status = "disabled";
+ num-slots = <1>;
+ channel = <1>;
+ fixed_voltage;
+ enable-cclk-on-suspend;
+ caps-control;
+ supports-highspeed;
+ supports-4bit;
+ keep-power-in-suspend;
+ pm-ignore-notify;
+ card-detect-type-external;
+ use-broken-voltage;
+ fifo-depth = <0x40>;
+ card-detect-delay = <200>;
+ qos-dvfs-level = <100000>;
+ data-timeout = <200>;
+ hto-timeout = <80>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <3 0 2 0>;
+ samsung,dw-mshc-ddr-timing = <3 0 2 1>;
+ samsung,dw-mshc-sdr50-timing = <3 0 4 2>;
+ samsung,dw-mshc-sdr104-timing = <3 0 3 0>;
+
+ num-ref-clks = <9>;
+ ciu_clkin = <25 50 50 25 50 100 200 50 50>;
+
+ clk-drive-number = <4>;
+ pinctrl-names = "default",
+ "fast-slew-rate-1x",
+ "fast-slew-rate-2x",
+ "fast-slew-rate-3x",
+ "fast-slew-rate-4x";
+ pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus1 &sd1_bus4>;
+ pinctrl-1 = <&sd1_clk_fast_slew_rate_1x>;
+ pinctrl-2 = <&sd1_clk_fast_slew_rate_2x>;
+ pinctrl-3 = <&sd1_clk_fast_slew_rate_3x>;
+ pinctrl-4 = <&sd1_clk_fast_slew_rate_4x>;
+ slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+ };
+ };
+
+ tsp_ldo_en {
+ compatible = "regulator-fixed";
+ regulator-name = "tsp_ldo_en";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpg3 0 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ i2c_4: i2c@13870000 {
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-max-bus-freq = <400000>;
+ status = "okay";
+ touchscreen@20 {
+ compatible = "zinitix,bt532_ts_device";
+ reg = <0x20>;
+ pinctrl-names = "on_state", "off_state";
+ pinctrl-0 = <&attn_irq>;
+ pinctrl-1 = <&attn_input>;
+ zinitix,irq_gpio = <&gpa0 0 0>;
+ zinitix,gpio_ldo_en;
+ zinitix,regulator_avdd = "tsp_ldo_en";
+ zinitix,x_resolution = <720>;
+ zinitix,y_resolution = <1480>;
+ zinitix,page_size = <128>;
+ zinitix,chip_name = "ZT7548";
+ zinitix,firmware_name = "tsp_zinitix/zt7548_a6.fw";
+ /* zinitix,spay = "true"; */
+ /* zinitix,aod = "true"; */
+ zinitix,tclm_level = <0x01>;
+ zinitix,afe_base = <0x0000>;
+ zinitix,mis_cal_check;
+ zinitix,factory_item_version = <4>;
+ };
+ };
+
+ pinctrl@11CB0000 {
+ attn_irq: attn-irq {
+ samsung,pins = "gpa0-0";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+ attn_input: attn-input {
+ samsung,pins = "gpa0-0";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <1>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ fimc_is_flash_host: fimc-is-flash-host {
+ samsung,pins = "gpg1-2";
+ samsung,pin-function = <1>; /* 0: input, 1:output*/
+ samsung,pin-pud = <0>; /* 0: NP, 1: PD, 2: reserved 3:PU */
+ samsung,pin-drv = <0>;
+ };
+ fimc_is_flash_is: fimc-is-flash-is {
+ samsung,pins = "gpg1-2";
+ samsung,pin-function = <0>; /* 0: input, 1:output*/
+ samsung,pin-pud = <1>; /* 0: NP, 1: PD, 2: reserved 3:PU */
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ pinctrl@11CB0000 {
+ grip_int: grip-int {
+ samsung,pins = "gpa2-7";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ grip_ldo: grip-ldo {
+ samsung,pins = "gpg2-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ };
+ cfg_i2c: cfg-i2c {
+ samsung,pins = "gpp4-2", "gpp4-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c_5:i2c@13880000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-max-bus-freq = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cfg_i2c>;
+
+ a96t3x6@20 {
+ compatible = "a96t3x6";
+ pinctrl-names = "default", "grip_ldo";
+ pinctrl-0 = <&grip_int &grip_ldo>;
+ reg = <0x20>;
+ interrupt-parent = <&gpa2>;
+ interrupts = <7 0 0>;
+ a96t3x6,irq_gpio = <&gpa2 7 0>;
+ a96t3x6,ldo_en = <&gpg2 5 0>;
+ /* temporary firmware */
+ a96t3x6,fw_path = "abov/a96t326_a5y18.fw";
+ a96t3x6,firmup_cmd = <0x32>;
+ };
+ };
+
+ dwmmc2@13550000 {
+ status = "okay";
+ num-slots = <1>;
+ supports-4bit;
+ supports-cmd23;
+ supports-erase;
+ supports-highspeed;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ card-detect-gpio;
+ card-no-pre-powerup;
+ bypass-for-allpass;
+ card-init-hwacg-ctrl;
+ skip-init-mmc-scan;
+ qos-dvfs-level = <100000>;
+ qos-sd3-dvfs-level = <267000>;
+ fifo-depth = <0x40>;
+ desc-size = <4>;
+ card-detect-delay = <200>;
+ data-timeout = <200>;
+ hto-timeout = <80>;
+ samsung,dw-mshc-ciu-div = <3>;
+ clock-frequency = <800000000>;
+ samsung,dw-mshc-sdr-timing = <3 0 2 0>;
+ samsung,dw-mshc-ddr-timing = <3 0 2 1>;
+ samsung,dw-mshc-sdr50-timing = <3 0 4 2>;
+ samsung,dw-mshc-sdr104-timing = <3 0 3 0>;
+
+ num-ref-clks = <9>;
+ ciu_clkin = <25 50 50 25 50 100 200 50 50>;
+
+ /* Swapping clock drive strength */
+ clk-drive-number = <4>;
+ pinctrl-names = "default",
+ "fast-slew-rate-1x",
+ "fast-slew-rate-2x",
+ "fast-slew-rate-3x",
+ "fast-slew-rate-4x";
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &dwmmc2_cd_ext_irq>;
+ pinctrl-1 = <&sd2_clk_fast_slew_rate_1x>;
+ pinctrl-2 = <&sd2_clk_fast_slew_rate_2x>;
+ pinctrl-3 = <&sd2_clk_fast_slew_rate_3x>;
+ pinctrl-4 = <&sd2_clk_fast_slew_rate_4x>;
+
+ card-detect = <&gpa0 7 0xf>;
+ sec-sd-slot-type = <2>; /* Hybrid Tray SD slot */
+
+ slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+ disable-wp;
+ };
+
+ };
+
+ pinctrl@11CB0000 {
+ key_power: key-power {
+ samsung,pins = "gpa1-7";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ key_voldown: key-voldown {
+ samsung,pins = "gpa1-6";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ key_volup: key-volup {
+ samsung,pins = "gpa1-5";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ hall_irq: hall-irq {
+ samsung,pins = "gpa0-3";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ certify_hall_irq: certify-hall-irq {
+ samsung,pins = "gpa0-4";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ flip_cover {
+ status = "okay";
+ compatible = "flip_cover";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hall_irq &certify_hall_irq>;
+ hall {
+ name = "hall";
+ event = <0x15>;
+ gpios = <&gpa0 3 0>;
+ };
+ certify_hall {
+ name = "certify_hall";
+ event = <0x1b>;
+ gpios = <&gpa0 4 0xf>;
+ };
+ };
+
+ gpio_keys {
+ status = "okay";
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_voldown &key_volup &key_power>;
+ button@1 {
+ label = "gpio-keys: KEY_VOLUMEDOWN";
+ interrupts = <6 0 0>;
+ interrupt-parent = <&gpa1>;
+ linux,code = <114>;
+ gpios = <&gpa1 6 0xf>;
+ };
+ button@2 {
+ label = "gpio-keys: KEY_VOLUMEUP";
+ interrupts = <5 0 0>;
+ interrupt-parent = <&gpa1>;
+ linux,code = <115>;
+ gpios = <&gpa1 5 0xf>;
+ };
+ button@3 {
+ label = "gpio-keys: KEY_POWER";
+ interrupts = <7 0 0>;
+ interrupt-parent = <&gpa1>;
+ linux,code = <116>;
+ gpios = <&gpa1 7 0xf>;
+ gpio-key,wakeup = <1>;
+ };
+
+ };
+
+ sec_abc {
+ compatible = "samsung,sec_abc";
+ status = "okay";
+
+ gpu {
+ gpu,label="GPU fault";
+ gpu,threshold_count=<20>;
+ gpu,threshold_time=<1200>;
+ };
+ aicl {
+ aicl,label="battery aicl";
+ aicl,threshold_count=<5>;
+ aicl,threshold_time=<300>;
+ };
+ };
+
+ idma_g0: dpp@0x148B1000{
+ memory-region = <&fb_handover>;
+ };
+
+ dsim_0: dsim@0x14870000 {
+ lcd_info = <&s6e8aa5>;
+ decon_board = <&decon_board>;
+ };
+
+ decon_f: decon_f@0x14860000 {
+ psr_mode = <0>; /* 0: video mode, 1: DP command mode, 2: MIPI command mode */
+ trig_mode = <1>; /* 0: hw trigger, 1: sw trigger */
+ dsi_mode = <0>; /* 0: single dsi, 1: dual dsi */
+
+ gpio_det = <&gpa0 1 0x1>;
+ gpio_pcd = <&gpa0 6 0x1>;
+ };
+
+ decon_board: decon_board {
+ gpio_ldo_3p0 = <&gpg2 7 0x1>;
+ gpio_lcd_pwr_en = <&gpg2 6 0x1>;
+ gpio_lcd_rst = <&gpg1 7 0x1>;
+
+ dsim_set_panel_power_enable {
+ type =
+ "gpio,high", "gpio_ldo_3p0",
+ "gpio,high", "gpio_lcd_pwr_en",
+ "delay,usleep", "5000 6000";
+ };
+ dsim_set_panel_power_disable {
+ type =
+ "gpio,low", "gpio_lcd_rst",
+ "delay,usleep", "1000 1100",
+ "gpio,low", "gpio_lcd_pwr_en",
+ "gpio,low", "gpio_ldo_3p0";
+ };
+ dsim_reset_panel {
+ type =
+ "gpio,high", "gpio_lcd_rst",
+ "delay,usleep", "5000 6000",
+ "gpio,low", "gpio_lcd_rst",
+ "delay,usleep", "5000 6000",
+ "gpio,high", "gpio_lcd_rst",
+ "delay,usleep", "10000 11000";
+ };
+ };
+
+ usb@13600000 {
+ status = "okay";
+ dwc3 {
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+ snps,quirk-frame-length-adjustment = <0x20>;
+ };
+ };
+
+ phy@135D0000 {
+ status = "okay";
+ hs_tune_param = <&usb_hs_tune>;
+ };
+
+ usb_hs_tune:hs_tune {
+ hs_tune_cnt = <12>;
+
+ /* value = */
+ hs_tune1 {
+ tune_name = "tx_vref";
+ tune_value = <0xd 0x1>;
+ };
+
+ hs_tune2 {
+ tune_name = "tx_pre_emp";
+ tune_value = <0x3 0x3>;
+ };
+
+ hs_tune3 {
+ tune_name = "tx_pre_emp_plus";
+ tune_value = <0x0 0x0>;
+ };
+
+ hs_tune4 {
+ tune_name = "tx_res";
+ tune_value = <0x3 0x3>;
+ };
+
+ hs_tune5 {
+ tune_name = "tx_rise";
+ tune_value = <0x3 0x3>;
+ };
+
+ hs_tune6 {
+ tune_name = "tx_hsxv";
+ tune_value = <0x3 0x3>;
+ };
+
+ hs_tune7 {
+ tune_name = "tx_fsls";
+ tune_value = <0x3 0x3>;
+ };
+
+ hs_tune8 {
+ tune_name = "rx_sqrx";
+ tune_value = <0x7 0x7>;
+ };
+
+ hs_tune9 {
+ tune_name = "compdis";
+ tune_value = <0x7 0x7>;
+ };
+
+ hs_tune10 {
+ tune_name = "otg";
+ tune_value = <0x2 0x2>;
+ };
+
+ hs_tune11 {
+ /* true : 1, false: 0 */
+ /* */
+ tune_name = "enable_user_imp";
+ tune_value = <0x0 0x0>;
+ };
+
+ hs_tune12 {
+ /* PHY clk : 1 , FREE clk : 0 */
+ tune_name = "is_phyclock";
+ tune_value = <0x1 0x1>;
+ };
+ };
+
+ mailbox_cp: mcu_ipc@12080000 {
+ compatible = "samsung,exynos-shd-ipc-mailbox";
+ reg = <0x0 0x12080000 0x180>;
+ mcu,name = "mcu_ipc_cp";
+ mcu,id = <0>;
+ interrupts = <0 55 0 >; /* MAILBOX_CP_TO_AP SPI Number */
+ };
+
+ mailbox_gnss: mcu_ipc@120D0000 {
+ compatible = "samsung,exynos-shd-ipc-mailbox";
+ reg = <0x0 0x120D0000 180>;
+ mcu,name = "mcu_ipc_gnss";
+ mcu,id = <1>;
+ interrupts = ;
+ };
+
+ gnss_pdata {
+ status = "okay";
+
+ compatible = "samsung,gnss_shdmem_if";
+ shmem,name = "KEPLER";
+ shmem,device_node_name = "gnss_ipc";
+
+ /* ACTIVE WATCHDOG WAKEUP */
+ interrupts = ,
+ ,
+ ;
+ interrupt-names = "ACTIVE", "WATCHDOG", "WAKEUP";
+
+ memory-region = <&gnss_reserved>;
+ mbox_info = <&mailbox_gnss>;
+
+ mbx,int_ap2gnss_bcmd = <0>;
+ mbx,int_ap2gnss_req_fault_info = <1>;
+ mbx,int_ap2gnss_ipc_msg = <2>;
+ mbx,int_ap2gnss_ack_wake_set = <3>;
+ mbx,int_ap2gnss_ack_wake_clr = <4>;
+
+ mbx,irq_gnss2ap_bcmd = <0>;
+ mbx,irq_gnss2ap_rsp_fault_info = <1>;
+ mbx,irq_gnss2ap_ipc_msg = <2>;
+ mbx,irq_gnss2ap_req_wake_clr = <4>;
+
+ mbx,reg_bcmd_ctrl = <0>, <1>, <2>, <3>;
+
+ reg_rx_ipc_msg = <1 5>;
+ reg_tx_ipc_msg = <1 4>;
+ reg_rx_head = <1 3>;
+ reg_rx_tail = <1 2>;
+ reg_tx_head = <1 1>;
+ reg_tx_tail = <1 0>;
+ fault_info = <1 0x200000 0x180000>;
+
+ shmem,ipc_offset = <0x380000>;
+ shmem,ipc_size = <0x80000>;
+ shmem,ipc_reg_cnt = <32>;
+
+ /* Use the following value when can't boot with mailbox */
+ shmem,boot_without_mbox = <1>; /* Default : 0 */
+ };
+
+ usb_notifier {
+ compatible = "samsung,usb-notifier";
+ udc = <&udc>;
+ };
+
+ i2c@13840000{
+ status = "okay";
+ s2mu004@3D {
+ status = "okay";
+ compatible = "samsung,s2mu004mfd";
+ reg = <0x3D>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&if_pmic_irq>;
+ s2mu004,irq-gpio = <&gpa2 2 1>;
+ s2mu004,wakeup;
+ };
+ };
+
+ fimc_is@14440000 {
+ pinctrl-names = "default","release";
+ pinctrl-0 = <&fimc_is_mclk0_out &fimc_is_mclk1_out &fimc_is_mclk2_out>;
+ pinctrl-1 = <>;
+
+ vender {
+ rear_sensor_id = <58>; /* SENSOR_NAME_S5K2P6 */
+ front_sensor_id = <44>; /* SENSOR_NAME_S5K3P8SP */
+ use_module_check;
+ check_sensor_vendor;
+ /*skip_cal_loading;*/
+
+ max_camera_num = <2>;
+ camera_info0 { // 0 : rear - 2p6
+ isp = <0>; /* 0 : INT , 1 : EXT , 2 : SOC */
+ cal_memory = <2>; /* 0 : N , 1 : FROM , 2 : EEPROM , 3 : OTP */
+ read_version = <0>; /* 0 : SYSFS , 1 : CAMON */
+ core_voltage = <0>; /* 0 : N , 1 : Y */
+ upgrade = <0>; /* 0 : N , 1 : SYSFS , 2 : CAMON */
+ companion = <0>; /* 0 : N , 1 : Y */
+ ois = <0>; /* 0 : N , 1 : Y */
+ valid = <1>; /* 0 : INVALID, 1 : VALID */
+ dual_open = <0>; /* 0 : SINGLE_OPEN , 1 : DUAL_OPEN */
+ };
+ camera_info1 { // 1 : front1 - 3p8sp
+ isp = <0>; /* 0 : INT , 1 : EXT , 2 : SOC */
+ cal_memory = <2>; /* 0 : N , 1 : FROM , 2 : EEPROM , 3 : OTP */
+ read_version = <0>; /* 0 : SYSFS , 1 : CAMON */
+ core_voltage = <0>; /* 0 : N , 1 : Y */
+ upgrade = <0>; /* 0 : N , 1 : SYSFS , 2 : CAMON */
+ companion = <0>; /* 0 : N , 1 : Y */
+ ois = <0>; /* 0 : N , 1 : Y */
+ valid = <1>; /* 0 : INVALID, 1 : VALID */
+ dual_open = <0>; /* 0 : SINGLE_OPEN , 1 : DUAL_OPEN */
+ };
+ };
+
+ fimc_is_dvfs {
+ /* TODO: DVFS level set */
+ #define DVFS_INT_L0 533000
+ #define DVFS_INT_L1 333000
+ #define DVFS_INT_L2 267000
+ #define DVFS_INT_L3 133000
+ #define DVFS_INT_L4 107000
+
+ #define DVFS_CAM_L0 690000
+ #define DVFS_CAM_L1 680000
+ #define DVFS_CAM_L2 670000
+ #define DVFS_CAM_L3 660000
+ #define DVFS_CAM_L4 650000
+
+ #define DVFS_MIF_L0 2093000
+ #define DVFS_MIF_L1 2002000
+ #define DVFS_MIF_L2 1794000
+ #define DVFS_MIF_L3 1539000
+ #define DVFS_MIF_L4 1352000
+ #define DVFS_MIF_L5 1014000
+ #define DVFS_MIF_L6 845000
+ #define DVFS_MIF_L7 676000
+ #define DVFS_MIF_L8 546000
+ #define DVFS_MIF_L9 420000
+
+ table0 {
+ desc = "default";
+
+ default_int = ;
+ default_cam = ;
+ default_mif = ;
+ default_i2c = <0>;
+
+ front_preview_int = ;
+ front_preview_cam = ;
+ front_preview_mif = ;
+ front_preview_i2c = <0>;
+
+ front_capture_int = ;
+ front_capture_cam = ;
+ front_capture_mif = ;
+ front_capture_i2c = <0>;
+
+ front_video_int = ;
+ front_video_cam = ;
+ front_video_mif = ;
+ front_video_i2c = <0>;
+
+ front_vt1_int = ;
+ front_vt1_cam = ;
+ front_vt1_mif = ;
+ front_vt1_i2c = <0>;
+
+ front_vt2_int = ;
+ front_vt2_cam = ;
+ front_vt2_mif = ;
+ front_vt2_i2c = <0>;
+
+ front_vt4_int = ;
+ front_vt4_cam = ;
+ front_vt4_mif = ;
+ front_vt4_i2c = <0>;
+
+ rear_preview_fhd_int = ;
+ rear_preview_fhd_cam = ;
+ rear_preview_fhd_mif = ;
+ rear_preview_fhd_i2c = <0>;
+
+ rear_capture_int = ;
+ rear_capture_cam = ;
+ rear_capture_mif = ;
+ rear_capture_i2c = <0>;
+
+ rear_video_fhd_int = ;
+ rear_video_fhd_cam = ;
+ rear_video_fhd_mif = ;
+ rear_video_fhd_i2c = <0>;
+
+ rear_video_uhd_int = ;
+ rear_video_uhd_cam = ;
+ rear_video_uhd_mif = ;
+ rear_video_uhd_i2c = <0>;
+
+ rear_video_fhd_capture_int = ;
+ rear_video_fhd_capture_cam = ;
+ rear_video_fhd_capture_mif = ;
+ rear_video_fhd_capture_i2c = <0>;
+
+ rear_video_uhd_capture_int = ;
+ rear_video_uhd_capture_cam = ;
+ rear_video_uhd_capture_mif = ;
+ rear_video_uhd_capture_i2c = <0>;
+
+ preview_high_speed_fps_int = ;
+ preview_high_speed_fps_cam = ;
+ preview_high_speed_fps_mif = ;
+ preview_high_speed_fps_i2c = <0>;
+
+ video_high_speed_60fps_int = ;
+ video_high_speed_60fps_cam = ;
+ video_high_speed_60fps_mif = ;
+ video_high_speed_60fps_i2c = <0>;
+
+ video_high_speed_120fps_int = ;
+ video_high_speed_120fps_cam = ;
+ video_high_speed_120fps_mif = ;
+ video_high_speed_120fps_i2c = <0>;
+
+ max_int = ;
+ max_cam = ;
+ max_mif = ;
+ max_i2c = <0>;
+ };
+
+ table1 {
+ desc = "DVFS table for HAL3";
+
+ default_int = ;
+ default_cam = ;
+ default_mif = ;
+ default_i2c = <0>;
+
+ front_preview_int = ;
+ front_preview_cam = ;
+ front_preview_mif = ;
+ front_preview_i2c = <0>;
+
+ front_capture_int = ;
+ front_capture_cam = ;
+ front_capture_mif = ;
+ front_capture_i2c = <0>;
+
+ front_video_int = ;
+ front_video_cam = ;
+ front_video_mif = ;
+ front_video_i2c = <0>;
+
+ front_vt1_int = ;
+ front_vt1_cam = ;
+ front_vt1_mif = ;
+ front_vt1_i2c = <0>;
+
+ front_vt2_int = ;
+ front_vt2_cam = ;
+ front_vt2_mif = ;
+ front_vt2_i2c = <0>;
+
+ front_vt4_int = ;
+ front_vt4_cam = ;
+ front_vt4_mif = ;
+ front_vt4_i2c = <0>;
+
+ rear_preview_fhd_int = ;
+ rear_preview_fhd_cam = ;
+ rear_preview_fhd_mif = ;
+ rear_preview_fhd_i2c = <0>;
+
+ rear_capture_int = ;
+ rear_capture_cam = ;
+ rear_capture_mif = ;
+ rear_capture_i2c = <0>;
+
+ rear_video_fhd_int = ;
+ rear_video_fhd_cam = ;
+ rear_video_fhd_mif = ;
+ rear_video_fhd_i2c = <0>;
+
+ rear_video_uhd_int = ;
+ rear_video_uhd_cam = ;
+ rear_video_uhd_mif = ;
+ rear_video_uhd_i2c = <0>;
+
+ rear_video_fhd_capture_int = ;
+ rear_video_fhd_capture_cam = ;
+ rear_video_fhd_capture_mif = ;
+ rear_video_fhd_capture_i2c = <0>;
+
+ rear_video_uhd_capture_int = ;
+ rear_video_uhd_capture_cam = ;
+ rear_video_uhd_capture_mif = ;
+ rear_video_uhd_capture_i2c = <0>;
+
+ preview_high_speed_fps_int = ;
+ preview_high_speed_fps_cam = ;
+ preview_high_speed_fps_mif = ;
+ preview_high_speed_fps_i2c = <0>;
+
+ video_high_speed_60fps_int = ;
+ video_high_speed_60fps_cam = ;
+ video_high_speed_60fps_mif = ;
+ video_high_speed_60fps_i2c = <0>;
+
+ video_high_speed_120fps_int = ;
+ video_high_speed_120fps_cam = ;
+ video_high_speed_120fps_mif = ;
+ video_high_speed_120fps_i2c = <0>;
+
+ max_int = ;
+ max_cam = ;
+ max_mif = ;
+ max_i2c = <0>;
+ };
+ };
+ };
+
+ fimc_is_sensor_2p6: fimc-is_sensor_2p6@5A {
+ compatible = "samsung,sensor-module-2p6";
+
+ pinctrl-names = "pin0", "pin1", "pin2", "release";
+ pinctrl-0 = <>;
+ pinctrl-1 = <&fimc_is_mclk0_out>;
+ pinctrl-2 = <&fimc_is_mclk0_fn>;
+ pinctrl-3 = <>;
+
+ use_pdaf;
+
+ position = <0>; /* Rear:0. Front:1 */
+ id = <0>; /* bns_id */
+ mclk_ch = <0>;
+
+ gpio_mclk = <&gpc0 0 0x1>;
+ gpio_reset = <&gpf3 2 0x1>; /* sensor reset - jackpot hw_rev = 100'b */
+ gpio_core_en = <&gpp0 2 0x1>; /* RCAM_LDO_EN */
+ gpio_cam_io_en = <&gpg2 0 0x1>; /* RCAM_IO_LDO_EN */
+ gpio_cam_af_en = <&gpp0 3 0x1>; /* RCAM_AF_2P8_EN */
+ status = "okay";
+
+ af {
+ product_name = <16>; /* AK7372 */
+ i2c_addr = <0x18>;
+ i2c_ch = <3>;
+ };
+
+ flash {
+ product_name = <5>; /* FLASH_KTD2692 */
+ flash_first_gpio = <2>; /* DICO not use first, second gpio value */
+ flash_second_gpio = <3>;
+ };
+
+ internal_vc {
+ /* vc_list =
+ * channel : Output VC channel
+ * - Supported channels are 1(VC1), 2(VC2), 3(VC3)
+ * - Since channel 0(VC0) is dedicated to image data, it can not be used
+
+ * data_type : Output type of VC channel
+ * - Value 0 VC_NOTHING
+ * - Value 1 VC_TAIL_MODE_PDAF
+ * - Value 2 VC_MIPI_STAT
+ * buffer_offset : get_vc_dma_buf offset value of buffer to return when using interface
+
+ * - Value 0 N buffer return
+ * - Value 1 N-1 buffer return
+ */
+
+ vc_list = <1 1 1>;
+ };
+ };
+
+ fimc_is_sensor_3p8sp: fimc-is_sensor_3p8sp@5A {
+ compatible = "samsung,sensor-module-3p8sp";
+
+ pinctrl-names = "pin0", "pin1", "pin2", "release";
+ pinctrl-0 = <>;
+ pinctrl-1 = <&fimc_is_mclk1_out>;
+ pinctrl-2 = <&fimc_is_mclk1_fn>;
+ pinctrl-3 = <>;
+
+ position = <1>; /* Rear:0. Front:1 */
+ id = <1>; /* bns_id */
+ mclk_ch = <1>;
+
+ gpio_mclk = <&gpc0 1 0x1>;
+ gpio_reset = <&gpf3 0 0x1>; /* sensor reset */
+ gpio_rcam_en = <&gpg2 0 0x1>; /* RCAM_IO_LDO_EN */
+ gpio_fcam1_en = <&gpp0 0 0x1>; /* FCAM1 all LDOs */
+ status = "okay";
+ };
+
+
+ fimc_is_flash_ktd2692: fimc-is-flash_ktd2692@0 {
+ compatible = "samsung,sensor-flash-ktd2692";
+ id = <0>; /* matching sensor id */
+ status = "okay";
+ };
+
+ leds_ktd2692 {
+ compatible = "ktd2692";
+ flash_control = <&gpg1 2 0x1>;
+ max_current = <1500>; /* (IMax) */
+ flash_current = <1200>; /* (n/16)xIMax (1<=n<=16) */
+ movie_current = <175>; /* (n/16)*IMax/3 (1<=n<=16) */
+ factory_current = <175>; /* (n/16)xIMax/3 (1<=n<=16) */
+ torch_current = <75>; /* (n/16)xIMax/3 (1<=n<=16) */
+ torch_table_enable = <1>;
+ torch_table = <1 2 2 3 3 4 4 4 5 5>;
+ status = "okay";
+ pinctrl-names ="default","host","is";
+ pinctrl-0 = <&fimc_is_flash_is>;
+ pinctrl-1 = <&fimc_is_flash_host>;
+ pinctrl-2 = <&fimc_is_flash_is>;
+ };
+
+ #define SENSOR_SCENARIO_NORMAL 0
+ #define SENSOR_SCENARIO_VISION 1
+ #define SENSOR_SCENARIO_EXTERNAL 2
+ #define SENSOR_SCENARIO_OIS_FACTORY 3
+ #define SENSOR_SCENARIO_VIRTUAL 9
+ #define FLITE_ID_NOTHING 100
+
+ fimc_is_sensor0: fimc_is_sensor@14410000 {
+ scenario = ; /* Normal, Vision, OIS etc */
+ id = <0>;
+ csi_ch = <1>;
+ flite_ch = ;
+ is_bns = <0>;
+ is_flite = <0>;
+ status = "okay";
+
+ use_ssvc1_internal;
+ };
+
+ fimc_is_sensor1: fimc_is_sensor@14400000 {
+ scenario = ; /* Normal, Vision, OIS etc */
+ id = <1>;
+ csi_ch = <0>;
+ flite_ch = ;
+ is_bns = <0>;
+ is_flite = <0>;
+ status = "okay";
+ };
+
+ fimc_is_sensor2: fimc_is_sensor@14420000 {
+ scenario = ; /* Normal, Vision, OIS etc */
+ id = <2>;
+ csi_ch = <2>;
+ flite_ch = ;
+ is_bns = <0>;
+ is_flite = <0>;
+ status = "okay";
+ };
+
+ hsi2c_1: hsi2c@138B0000 {
+ gpios = <&gpc1 2 0 &gpc1 3 0>;
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pinctrl-names = "on_i2c";
+ pinctrl-0 = <&hs_i2c1_bus>;
+
+ fimc-is-2p6@10 {
+ compatible = "samsung,exynos5-fimc-is-cis-2p6";
+ reg = <0x2d>; /* 1 bit right shift */
+ id = <0>; /* matching sensor id */
+ sensor_f_number = <170>; /* f number 1.7 */
+ setfile = "setB";
+
+ use_pdaf;
+ };
+ };
+
+ hsi2c_2: hsi2c@138C0000 {
+ gpios = <&gpc1 4 0 &gpc1 5 0>;
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pinctrl-names = "on_i2c";
+ pinctrl-0 = <&hs_i2c2_bus>;
+
+ fimc-is-actuator@18 {
+ compatible = "samsung,exynos5-fimc-is-actuator-ak7372";
+ reg = <0x0C>; /* 7bit-addr */
+ id = <0>;
+ place = <0>;
+ };
+
+ fimc_is_eeprom_i2c@A0 {
+ compatible = "samsung,rear-eeprom-i2c";
+ reg = <0x50>; /* 7bit-addr */
+ };
+
+ fimc_is_eeprom_i2c@A2 {
+ compatible = "samsung,front-eeprom-i2c";
+ reg = <0x51>; /* 7bit-addr */
+ };
+ };
+
+ hsi2c_0: hsi2c@138A0000 {
+ gpios = <&gpc1 0 0 &gpc1 1 0>;
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pinctrl-names = "on_i2c";
+ pinctrl-0 = <&hs_i2c0_bus>;
+
+ fimc-is-3p8sp@2D {
+ compatible = "samsung,exynos5-fimc-is-cis-3p8sp";
+ reg = <0x10>; /* 1 bit right shift */
+ id = <1>; /* matching sensor id */
+ sensor_f_number = <190>; /* f number 1.9 */
+ setfile = "setB";
+ };
+ };
+
+ /* DISPAUD */
+ pinctrl@148F0000 {
+ aud_fm_bus: aud-fm-bus {
+ samsung,pins = "gpb1-1", "gpb1-2", "gpb1-3";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <1>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ spi2_bus: spi2-bus {
+ samsung,pins = "gpc2-1", "gpc2-0";
+ samsung,pin-function = <2>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud = <1>;
+ samsung,pin-pud-pdn = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ spi2_bus_clk: spi2-bus-clk {
+ samsung,pins = "gpc2-3";
+ samsung,pin-function = <2>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud = <0>;
+ samsung,pin-pud-pdn = <0>;
+ samsung,pin-drv = <0>;
+ samsung,pin-val = <0>;
+ };
+
+ spi2_cs: spi2-cs {
+ samsung,pins = "gpc2-2";
+ samsung,pin-function = <2>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud = <3>;
+ samsung,pin-pud-pdn = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ aud_dmic_on: aud_dmic_on {
+ samsung,pins = "gpg2-1";
+ samsung,pin-function = <1>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-val = <1>;
+ };
+
+ aud_dmic_off: aud_dmic_off {
+ samsung,pins = "gpg2-1";
+ samsung,pin-function = <1>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-val = <1>;
+ };
+ };
+
+ spi_2: spi@13920000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <1>;
+
+ /delete-property/ dma-mode;
+ /delete-property/ dmas;
+ /delete-property/ dma-names;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_bus &spi2_bus_clk &spi2_cs>;
+ status = "okay";
+
+ dbmd4_spi: dbmd4_interface@0 {
+ compatible = "dspg,dbmd4-spi";
+ reg = <0x0>;
+ spi-max-frequency = <1000000>;
+ read-chunk-size = <0x2000>;
+ write-chunk-size = <0x40000>;
+
+ interrupts = <2 0 0>;
+ interrupt-parent = <&gpa0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ controller-data {
+ cs-gpio = <&gpc2 2 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ dbmdx_event {
+ status = "okay";
+ compatible = "samsung,dbmdx-event";
+ };
+
+ dbmdx-snd-soc-platform {
+ compatible = "dspg,dbmdx-snd-soc-platform";
+ };
+
+ snd-dbmdx-mach-drv {
+ compatible = "dspg,snd-dbmdx-mach-drv";
+ };
+
+ pinctrl@11CB0000 {
+ dbmdx_int: dbmdx-int {
+ samsung,pins = "gpa0-2";
+ samsung,pin-function = <0xf>;
+ samsung,pin-pud = <0>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ dbmdx_wakeup: dbmdx-wakeup {
+ samsung,pins ="gpg2-3";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-con-pdn =<3>;
+ samsung,pin-pud-pdn = <3>;
+ samsung,pin-val = <1>;
+ };
+
+ dbmdx_reset: dbmdx-reset {
+ samsung,pins ="gpg2-2";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-con-pdn =<3>;
+ samsung,pin-pud-pdn = <3>;
+ samsung,pin-val = <1>;
+ };
+ };
+
+ dbmdx {
+ status = "okay";
+ compatible = "dspg,dbmdx-codec";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&dbmdx_wakeup &dbmdx_reset>;
+
+ sv-gpio = <&gpa0 2 0>; /* VOICE_INT */
+ wakeup-gpio = <&gpg2 3 0>; /* VOICE_WAKE */
+ reset-gpio = <&gpg2 2 0>; /* VOICE_RST */
+ auto_buffering = <1>;
+ cmd-interface = <&dbmd4_spi>;
+ feature-va; /* enable VA */
+ va-firmware-name = "dbmd4_va_fw.bin";
+ va-config = <0x80000000
+ 0x80000000
+ 0x80000000
+ 0x80290020
+ 0x802210E0
+ 0x80158E8E
+ 0x801b0020
+ 0x801A0011
+ 0x80230001
+ 0x80108017
+ 0x80000000
+ 0x80000000
+ 0x80000000>;
+ va-speeds = <0x0000 460800 0 960000
+ 0x0000 2000000 0 4800000
+ 0x0000 3000000 0 4800000>;
+ va-mic-config = <0xf041 0x1044 0x0008>;
+ va-mic-mode = <0>;
+ master-clk-rate = <32768>;
+ /* constant-clk-rate = <32768>; */
+ firmware_id = <0xdbd4>;
+ use_gpio_for_wakeup = <1>; /* Use wakeup gpio */
+ wakeup_set_value = <0>; /* Value to write to wakeup gpio */
+ auto_detection = <1>;
+ detection_buffer_channels = <0>;
+ min_samples_chunk_size = <128>;
+ pcm_streaming_mode = <1>;
+ boot_options = <0x200>; /* Verify chip id */
+ send_uevent_after_buffering = <0>;
+ detection_after_buffering = <0>;
+ va_backlog_length = <1300>;
+ va_backlog_length_okg = <1000>;
+ send_uevent_on_detection = <1>;
+ amodel_options = <0x3>;
+ };
+
+ abox_gic: abox_gic@0x14AF0000 {
+ status = "okay";
+ };
+
+ i2c_3: i2c@13860000 {
+ status = "okay";
+ tfa98xx: tfa98xx@34 {
+ compatible = "nxp,tfa98xx";
+ #sound-dai-cells = <1>;
+ reg = <0x34>;
+ };
+ };
+
+ abox: abox@0x14A50000 {
+ status = "okay";
+ /* CAUTION:
+ * "try to asrc off" quirk must be in dts.
+ * It shouldn't be applied already audio tuned device,
+ * because it changes delay and causes re-tune.
+ */
+ /*
+ * TODO: enable later
+ */
+ /* quirks = "try to asrc off"; */
+
+ abox_synchronized_ipc: abox_synchronized_ipc {
+ compatible = "samsung,abox-synchronized-ipc";
+ #sound-dai-cells = <1>;
+ abox = <&abox>;
+ };
+ };
+
+ dummy_audio_codec: audio_codec_dummy {
+ status = "okay";
+ compatible = "snd-soc-dummy";
+ };
+
+ sound {
+ status = "okay";
+ compatible = "samsung,exynos7885-cod3035";
+ mic-bias-mode = <0 0 2 0>;
+ clock-names = "xclkout";
+ samsung,codec = <&abox>;
+
+ samsung,routing = "VOUTPUT", "ABOX UAIF0 Playback",
+ "VOUTPUTCALL", "ABOX UAIF2 Playback",
+ "ABOX UAIF2 Capture", "VINPUTCALL",
+ "ABOX SPEEDY Capture", "VINPUTFM",
+ // "SPK", "ABOX UAIF3 Playback",
+ // "ABOX UAIF3 Capture", "VI";
+ "SPK", "AIF Playback-8-34",
+ "AIF Playback-8-34", "ABOX UAIF3 Playback",
+ "ABOX UAIF3 Capture", "AIF Capture-8-34";
+
+ rdma@0 {
+ cpu {
+ sound-dai = <&abox 0>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@1 {
+ cpu {
+ sound-dai = <&abox 1>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@2 {
+ cpu {
+ sound-dai = <&abox 2>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@3 {
+ cpu {
+ sound-dai = <&abox 3>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@4 {
+ cpu {
+ sound-dai = <&abox 4>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@5 {
+ cpu {
+ sound-dai = <&abox 5>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@6 {
+ cpu {
+ sound-dai = <&abox 6>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ rdma@7 {
+ cpu {
+ sound-dai = <&abox 7>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ wdma@0 {
+ cpu {
+ sound-dai = <&abox 8>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ wdma@1 {
+ cpu {
+ sound-dai = <&abox 9>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ wdma@2 {
+ cpu {
+ sound-dai = <&abox 10>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ wdma@3 {
+ cpu {
+ sound-dai = <&abox 11>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ wdma@4 {
+ cpu {
+ sound-dai = <&abox 12>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ uaif@0 {
+ cpu {
+ sound-dai = <&abox 13>;
+ };
+ codec {
+ sound-dai = <&audio_codec_cod3035x>;
+ };
+ };
+ uaif@1 {
+ cpu {
+ sound-dai = <&abox 14>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ uaif@2 {
+ cpu {
+ sound-dai = <&abox 15>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ uaif@3 {
+ cpu {
+ sound-dai = <&abox 16>;
+ };
+ platform {
+ sound-dai = <&abox_synchronized_ipc 0>;
+ };
+ codec {
+ sound-dai = <&tfa98xx 0>;
+ };
+ };
+ internal@0 {
+ cpu {
+ sound-dai = <&abox 17>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ speedy@0 {
+ cpu {
+ sound-dai = <&abox 18>;
+ };
+ codec {
+ sound-dai = <&dummy_audio_codec>;
+ };
+ };
+ };
+
+ pinctrl@11CB0000 {
+ nfc_int: nfc-int {
+ samsung,pins = "gpa1-0";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <1>;
+ };
+
+ nfc_clk: nfc-clk {
+ samsung,pins = "gpq0-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpp6-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpp3-2";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_pd: nfc_pd {
+ samsung,pins = "gpp2-2";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_clk_req: nfc_clk_req {
+ samsung,pins = "gpp2-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+ i2c_2: i2c@13850000 {
+ status = "okay";
+ samsung,i2c-max-bus-freq = <400000>;
+ sec-nfc@27 {
+ compatible = "sec-nfc";
+ reg = <0x27>;
+
+ interrupts = <0 0 0>;
+ interrupt-parent = <&gpa1>;
+
+ sec-nfc,nfc_pd = <&gpp2 2 0x2>;
+ sec-nfc,firm-gpio = <&gpp3 2 1>;
+ sec-nfc,irq-gpio = <&gpa1 0 0>;
+ sec-nfc,nfc_clkreq = <&gpp2 3 0x2>;
+ sec-nfc,pvdd_en = <&gpp6 4 1>;
+ clkctrl-reg = <0x11C8600C>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ pinctrl@139B0000 {
+ spi0_bus_ese: spi0-bus-ese {
+ samsung,pins = "gpp5-3", "gpp5-2", "gpp5-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ spi0_ese_cs_gpio: spi0-ese-cs-gpio {
+ samsung,pins = "gpp5-1";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ spi0_bus_ese_suspend: spi0-bus-ese-suspend {
+ samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ spi_0: spi@13900000 {
+ status = "disabled";
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+
+ ese_spi@0 {
+ compatible = "ese_p3";
+ reg = <0>;
+ spi-max-frequency = <13000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ p3-vdd_1p8-gpio = <&gpg1 0 1>;
+ ese_p3,cs-gpio = <&gpp5 1 0>;
+
+ clocks = <&clock GATE_SPI0>, <&clock SPI_0>;
+ clock-names = "pclk", "sclk";
+
+ pinctrl-names = "ese_active", "ese_suspend";
+ pinctrl-0 = <&spi0_bus_ese &spi0_ese_cs_gpio>;
+ pinctrl-1 = <&spi0_bus_ese_suspend>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <0>;
+ samsung,spi-chip-select-mode = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ ssp_ap_int: ssp-ap-int {
+ samsung,pins = "gpg1-6";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <3>;
+ };
+ ssp_boot0: ssp-boot0 {
+ samsung,pins = "gpg1-3";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <3>;
+ };
+ ssp_rst: ssp-rst {
+ samsung,pins = "gpg3-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ spi4_clk: spi4-clk {
+ samsung,pins = "gpp8-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <2>;
+ };
+ spi4_cs: spi4-cs {
+ samsung,pins = "gpp8-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <2>;
+ };
+ spi4_miso: spi4-miso {
+ samsung,pins = "gpp7-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <2>;
+ };
+ spi4_mosi: spi4-mosi {
+ samsung,pins = "gpp7-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <2>;
+ };
+ };
+
+ pinctrl@11CB0000 {
+ ssp_mcu_int1: ssp-mcu-int1 {
+ samsung,pins = "gpa1-2";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ ssp_mcu_int2: ssp-mcu-int2 {
+ samsung,pins = "gpa1-3";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ mcu_ipc: mcu_ipc@12080000 {
+ mcu,irq_affinity_mask = <3>;
+ };
+
+ argos {
+ compatible = "samsung,argos";
+ #address-cells = <1>;
+ /* The device number should be assigned for each device, e.g. "boot_device@1" and "boot_device@2".
+ * Duplicated number is not allowed. Please refer the below example.
+ */
+
+ /* Table Format should be
+ *
+ * ARM_min : Big Core's minimum frequency lock. 0 means not set,
+ * ARM_max : Big Core's maximum frequency lock. 0 means not set,
+ * KFC_min : Little Core's minimum frequency lock. 0 means not set,
+ * KFC_max : Little Core's maximum frequency lock. 0 means not set,
+ * MIF : MIF frequency lock. 0 means not set,
+ * INT : INT frequency lock. 0 means not set,
+ * Task : 1 - Set task affinity lock.
+ * 0 - Not set or unlock,
+ * Task affinity should be predefined driver's code.
+ * IRQ : 1 - Set irq affinity lock.
+ * 0 - Not set or unlock,
+ * Task affinity should be predefined driver's code.
+ * HMP_boots : 1 - Increase hmp boosting count
+ * 0 - Decrease hmp boosting count
+ */
+
+ boot_device@1 {
+ net_boost,label="WIFI TX";
+ net_boost,node="wlan0";
+ net_boost,table_size = <2>;
+ net_boost,table= <
+ 60 1144000 0 676000 0 0 0 0 0 0
+ 120 1560000 0 1586000 0 0 267000 0 0 0
+ >;
+ };
+
+ boot_device@2 {
+ net_boost,label="WIFI RX";
+ net_boost,node="wlan0";
+ net_boost,table_size = <1>;
+ net_boost,table= <
+ 250 1352000 0 1352000 0 0 0 0 0 0
+ >;
+ };
+
+ boot_device@3 {
+ net_boost,label="IPC";
+ net_boost,node="rmnet0 rmnet1 rmnet2 rmnet3 rmnet4 rmnet5 rmnet6 rmnet7 umts_dm0";
+ net_boost,table_size = <4>;
+ net_boost,table= <
+ 100 0 0 1066000 0 845000 0 0 1 0
+ 150 0 0 1170000 0 1144000 0 0 1 0
+ 200 0 0 1378000 0 1539000 0 0 1 0
+ 300 0 0 1586000 0 1794000 0 0 1 0
+ >;
+ };
+
+ boot_device@4 {
+ net_boost,label="CLAT";
+ net_boost,node="clat clat4 v4-rmnet0 v4-rmnet1 v4-rmnet2 v4-rmnet3 v4-rmnet4 v4-rmnet5 v4-rmnet6 v4-rmnet7";
+ net_boost,table_size = <3>;
+ net_boost,table= <
+ 120 0 0 1378000 0 1144000 0 0 0 0
+ 130 0 0 1378000 0 1539000 0 0 0 0
+ 150 0 0 1586000 0 1794000 0 0 0 0
+ >;
+ };
+
+ boot_device@5 {
+ net_boost,label="USB";
+ net_boost,node="rndis0";
+ net_boost,table_size = <1>;
+ net_boost,table= < 0 0 0 0 0 0 0 0 1 0 >;
+ };
+
+ /*
+ * boot_device@9 {
+ * net_boost,label="WIFI RX";
+ * net_boost,node="wlan0";
+ * net_boost,table_size = <4>;
+ * net_boost,table= <
+ * 5 2002000 0 1690000 0 0 0 0 0 0
+ * 10 2002000 0 1690000 0 0 0 0 0 0
+ * 20 2002000 0 1690000 0 845000 400000 1 1 1
+ * 30 2002000 0 1690000 0 1352000 533000 1 1 1
+ * >;
+ * };
+ */
+ };
+
+ nad_balancer {
+ compatible = "samsung,sec_nad_balancer";
+ status = "okay";
+
+ nad_balancer,timeout = <400>;
+
+ qos {
+ cl0 {
+ qos,label="LIT";
+ qos,delay_time=<9>;
+ qos,table_size=<12>;
+ qos,table=<1586000 1482000 1352000 1248000 1144000 1014000 902000 839000 757000
+ 676000 546000 449000>;
+ };
+
+ cl1 {
+ qos,label="BIG";
+ qos,delay_time=<8>;
+ qos,table_size=<11>;
+ qos,table=<2184000 2080000 1976000 1872000 1768000 1664000 1560000 1352000 1144000
+ 936000 728000>;
+ };
+
+ mif {
+ qos,label="MIF";
+ qos,delay_time=<10>;
+ qos,table_size=<8>;
+ qos,table=<1794000 1539000 1352000 1014000 845000 676000 546000 420000>;
+ };
+ };
+
+ sleep {
+ /* per msec */
+ sleep,suspend_threshold = <1000>;
+ sleep,resume_threshold = <1000>;
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_00.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_00.dts
new file mode 100755
index 000000000000..f45887afe18d
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_00.dts
@@ -0,0 +1,145 @@
+/*
+ * SAMSUNG UNIVERSAL7885 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7885-jackpotlte_jpn_common.dtsi"
+#include "exynos7885-jackpotlte_fingerprint-sensor_00.dtsi"
+#include "exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi"
+#include "exynos7885-jackpotlte_mst_02.dtsi"
+#include "exynos7885-jackpotlte_svcled.dtsi"
+#include "exynos7885-jackpotlte_jpn-isdbt-00.dtsi"
+
+
+/ {
+ model = "Samsung JACKPOTLTE JPN DCM rev00 board based on EXYNOS7885";
+ model_info-chip = <7885>;
+ model_info-platform = "android";
+ model_info-subtype = "samsung";
+ model_info-hw_rev = <0>;
+ model_info-hw_rev_end = <255>;
+ compatible = "samsung, JACKPOTLTE JPN DCM rev00", "samsung,Universal7885";
+
+ /* SENSORHUB */
+ spi_4: spi@13980000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_miso &spi4_mosi &spi4_cs &spi4_clk>;
+ interrupts = <0 277 0>;
+
+ num-cs = <1>;
+ status = "okay";
+
+ STM32F@0 {
+ compatible = "ssp,STM32F";
+ reg = <0>;
+ spi-max-frequency = <8000000>;
+ spi-cpol;
+ spi-cpha;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp_rst &ssp_ap_int &ssp_mcu_int1 &ssp_mcu_int2 &ssp_boot0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ssp,mcu_int1-gpio = <&gpa1 2 0x00>;
+ ssp,mcu_int2-gpio = <&gpa1 3 0x00>;
+ ssp,ap_int-gpio = <&gpg1 6 0x01>;
+ ssp,rst-gpio = <&gpg3 5 0x01>;
+ ssp,boot0-gpio = <&gpg1 3 0x1>;
+ ssp,acc-position = <7>;
+ ssp,mag-position = <5>;
+ ssp-sns-combination = <0>;
+ ssp,prox-hi_thresh = <55>;
+ ssp,prox-low_thresh = <40>;
+ ssp,prox-detect_hi_thresh = <250>;
+ ssp,prox-detect_low_thresh = <130>;
+ ssp-ap-rev = <1>;
+ ssp-mag-array = /bits/ 8 <207 82 201 4 218 137 254 197 213
+ 55 35 84 243 129 255 167 2 43
+ 230 232 191 252 243 208 9 197 21>;
+ ssp-mag-type = <1>;
+ ssp-glass-type = <0>;
+ ssp-acc-type = <1>;
+ ssp-pressure-type = <1>;
+ ssp-project-type = <1>;
+
+
+ controller-data {
+ cs-gpio = <&gpp8 0 0>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+ };
+
+ pinctrl@139B0000 {
+ nfc_pvdd_en: nfc_pvdd_en {
+ samsung,pins = "gpg1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+
+ nfc_firm: nfc_firm {
+ samsung,pins = "gpg1-4";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-val = <0>;
+ samsung,pin-con-pdn = <3>;
+ samsung,pin-pud-pdn = <0>;
+ };
+ };
+
+ i2c_2: i2c@13850000 {
+ sec-nfc@27 {
+ sec-nfc,firm-gpio = <&gpg1 4 1>;
+ sec-nfc,pvdd_en = <&gpg1 5 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&nfc_pd &nfc_firm &nfc_int &nfc_clk &nfc_pvdd_en &nfc_clk_req>;
+ };
+ };
+
+ /* USIM DETECTION FOR CP */
+ usim_det {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sim0_det_gpio>;
+ mif,num_of_usim_det = <1>;
+ mif,usim-det0-gpio = <&gpa2 6 0>;
+ };
+
+ /* motor control type : 1 = IFPMIC */
+ /* 2 = Mot driving IC */
+ motor {
+ motor,motor_type = <1>;
+ };
+
+ pinctrl@139B0000 {
+ motor_pwm: motor_pwm {
+ samsung,pins = "gpg0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <1>;
+ samsung,pin-drv = <0>;
+ };
+ };
+
+ i2c@13830000 {
+ s2mu004-haptic@3A {
+ compatible = "sec,s2mu004-haptic";
+ reg = <0x3A>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&motor_pwm>;
+
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi
new file mode 100755
index 000000000000..38efd6f278b8
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_jpn_dcm_gpio_00.dtsi
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos_gpio_config_macros.dtsi"
+
+/* 0x11CB_0000(ALIVE): etc0~1, gpa0~2, gpq0 */
+&pinctrl_0 {
+ /*
+ * Note:
+ * Please do not make "sleep-state" node for GPA group GPIOs.
+ * GPA group doesn't have power-down status.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial0>;
+ initial0: initial-state {
+ PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
+ PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpq0-1, DOWN, LV1); /* NC */
+ };
+};
+
+/* 0x148F_0000(DISPAUD): gpb0~2 */
+&pinctrl_1 {
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&sleep1>;
+ sleep1: sleep-state {
+ PIN_SLP(gpb0-0, INPUT, DOWN); /* PM_I2S0_CLK */
+ PIN_SLP(gpb0-1, INPUT, DOWN); /* PM_I2S0_BCLK */
+ PIN_SLP(gpb0-2, INPUT, DOWN); /* PM_I2S0_SYNC */
+ PIN_SLP(gpb0-3, INPUT, DOWN); /* PM_I2S0_DO */
+ PIN_SLP(gpb0-4, INPUT, DOWN); /* PM_I2S0_DI */
+
+ PIN_SLP(gpb1-0, INPUT, DOWN); /* FB_I2S1_SDI */
+ PIN_SLP(gpb1-1, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-2, INPUT, DOWN); /* NC */
+ PIN_SLP(gpb1-3, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpb2-0, INPUT, DOWN); /* SPK_I2S3_BCLK */
+ PIN_SLP(gpb2-1, INPUT, DOWN); /* SPK_I2S3_WS */
+ PIN_SLP(gpb2-2, INPUT, DOWN); /* SPK_I2S3_DO */
+ PIN_SLP(gpb2-3, INPUT, DOWN); /* SPK_I2S3_DI */
+ PIN_SLP(gpb2-4, INPUT, DOWN); /* FM_SPDY_TO_S612 */
+ };
+};
+
+/* 0x1343_0000(FSYS): gpf0,2~4 */
+&pinctrl_2 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial2>;
+ pinctrl-1 = <&sleep2>;
+ initial2: initial-state {
+ PIN_IN(gpf3-4, DOWN, LV1); /* NC */
+ };
+ sleep2: sleep-state {
+ PIN_SLP(gpf0-0, OUT0, NONE); /* SD_0_CLK */
+ PIN_SLP(gpf0-1, OUT1, NONE); /* SD_0_CMD */
+ PIN_SLP(gpf0-2, INPUT, DOWN); /* SD_0_RDQS */
+ PIN_SLP(gpf0-3, PREV, NONE); /* SD_0_HWreset */
+
+ PIN_SLP(gpf2-0, OUT0, NONE); /* SD_0_DATA_0 */
+ PIN_SLP(gpf2-1, OUT0, NONE); /* SD_0_DATA_1 */
+ PIN_SLP(gpf2-2, OUT0, NONE); /* SD_0_DATA_2 */
+ PIN_SLP(gpf2-3, OUT0, NONE); /* SD_0_DATA_3 */
+ PIN_SLP(gpf2-4, OUT0, NONE); /* SD_0_DATA_4 */
+ PIN_SLP(gpf2-5, OUT0, NONE); /* SD_0_DATA_5 */
+ PIN_SLP(gpf2-6, OUT0, NONE); /* SD_0_DATA_6 */
+ PIN_SLP(gpf2-7, OUT0, NONE); /* SD_0_DATA_7 */
+
+ PIN_SLP(gpf4-0, OUT0, NONE); /* SD_2_CLK */
+ PIN_SLP(gpf4-1, OUT0, NONE); /* SD_2_CMD */
+ PIN_SLP(gpf4-2, OUT0, NONE); /* SD_2_DATA_0 */
+ PIN_SLP(gpf4-3, OUT0, NONE); /* SD_2_DATA_1 */
+ PIN_SLP(gpf4-4, OUT0, NONE); /* SD_2_DATA_2 */
+ PIN_SLP(gpf4-5, OUT0, NONE); /* SD_2_DATA_3 */
+
+ PIN_SLP(gpf3-4, INPUT, DOWN); /* NC */
+ };
+};
+
+/* 0x139B_0000(TOP): gpp0~8, gpg0~4, gpc0~2 */
+&pinctrl_3 {
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&initial3>;
+ pinctrl-1 = <&sleep3>;
+ initial3: initial-state {
+ PIN_IN(gpp4-4, DOWN, LV1); /* NC */
+ PIN_IN(gpp4-5, DOWN, LV1); /* NC */
+ PIN_OUT_SET(gpg1-6, 1, LV1); /* SSP_AP_INT */
+ PIN_OUT_SET(gpg3-0, 1, LV1); /* TSP_LDO_EN */
+ PIN_OUT_SET(gpg3-5, 1, LV1); /* SSP_RST */
+ PIN_IN(gpg3-7, NONE, LV1); /* HW_REV0 */
+ PIN_IN(gpg4-0, NONE, LV1); /* HW_REV1 */
+ PIN_IN(gpg4-1, NONE, LV1); /* HW_REV2 */
+
+ };
+ sleep3: sleep-state {
+ PIN_SLP(gpg0-1, PREV, NONE); /* MOT_PWM */
+
+ PIN_SLP(gpp1-0, INPUT, NONE); /* FG_I2C_SCL */
+ PIN_SLP(gpp1-1, INPUT, NONE); /* FG_I2C_SDA */
+ PIN_SLP(gpp1-2, PREV, NONE); /* IF_PMIC_I2C_SCL */
+ PIN_SLP(gpp1-3, PREV, NONE); /* IF_PMIC_I2C_SDA */
+
+ PIN_SLP(gpp2-0, INPUT, NONE); /* NFC_I2C_SCL */
+ PIN_SLP(gpp2-1, INPUT, NONE); /* NFC_I2C_SDA */
+
+ PIN_SLP(gpp3-0, INPUT, NONE); /* SPK_AMP_I2C_SCL */
+ PIN_SLP(gpp3-1, INPUT, NONE); /* SPK_AMP_I2C_SDA */
+ PIN_SLP(gpp3-2, OUT0, DOWN); /* MST_DATA_A */
+
+ PIN_SLP(gpp4-0, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-1, INPUT, NONE); /* TSP_I2C_SCL */
+ PIN_SLP(gpp4-2, INPUT, NONE); /* GRIP_I2C_SDA */
+ PIN_SLP(gpp4-3, INPUT, NONE); /* GRIP_I2C_SCL */
+ PIN_SLP(gpp4-4, INPUT, DOWN); /* NC */
+ PIN_SLP(gpp4-5, INPUT, DOWN); /* NC */
+
+ PIN_SLP(gpp6-0, OUT0, NONE); /* BTP_SPI_CLK */
+ PIN_SLP(gpp6-1, OUT0, NONE); /* BTP_SPI_CS_N */
+ PIN_SLP(gpp6-2, INPUT, DOWN); /* BTP_SPI_MISO */
+ PIN_SLP(gpp6-3, OUT0, NONE); /* BTP_SPI_MOSI */
+ PIN_SLP(gpp6-4, OUT0, DOWN); /* MST_DATA_B(EN) */
+
+ PIN_SLP(gpp7-0, INPUT, DOWN); /* SSP_SPI_MISO */
+ PIN_SLP(gpp7-1, OUT1, UP); /* SSP_SPI_MOSI */
+
+ PIN_SLP(gpp8-0, OUT1, UP); /* SSP_SPI_SS_N */
+ PIN_SLP(gpp8-1, OUT1, UP); /* SSP_SPI_CLK */
+
+ PIN_SLP(gpg1-0, INPUT, DOWN); /* NC */
+ PIN_SLP(gpg1-1, PREV, NONE); /* PMIC_WRSTBI */
+ PIN_SLP(gpg1-2, PREV, NONE); /* CAM_FLASH_EN */
+ PIN_SLP(gpg1-3, PREV, NONE); /* SSP_BOOT0 */
+ PIN_SLP(gpg1-6, PREV, NONE); /* SSP_AP_INT */
+ PIN_SLP(gpg1-7, PREV, NONE); /* MLCD_RST */
+
+ PIN_SLP(gpg2-6, PREV, NONE); /* LCD_PWR_EN */
+ PIN_SLP(gpg2-7, PREV, NONE); /* LCD_LDO_3P0 */
+
+ PIN_SLP(gpg3-0, PREV, NONE); /* TSP_LDO_EN */
+ PIN_SLP(gpg3-1, PREV, DOWN); /* MST_PWR_EN */
+ PIN_SLP(gpg3-3, PREV, NONE); /* BTP_LDO_EN */
+ PIN_SLP(gpg3-4, PREV, NONE); /* BTP_RST_N */
+ PIN_SLP(gpg3-5, PREV, NONE); /* SSP_RST */
+ PIN_SLP(gpg3-6, INPUT, NONE); /* TSP_ID */
+ PIN_SLP(gpg3-7, INPUT, NONE); /* HW_REV0 */
+
+ PIN_SLP(gpg4-0, INPUT, NONE); /* HW_REV1 */
+ PIN_SLP(gpg4-1, INPUT, NONE); /* HW_REV2 */
+
+ PIN_SLP(gpc1-0, INPUT, DOWN); /* FCAM1_I2C_SCL */
+ PIN_SLP(gpc1-1, INPUT, DOWN); /* FCAM1_I2C_SDA */
+ PIN_SLP(gpc1-2, INPUT, DOWN); /* RCAM_I2C_SCL */
+ PIN_SLP(gpc1-3, INPUT, DOWN); /* RCAM_I2C_SDA */
+ PIN_SLP(gpc1-4, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SCL */
+ PIN_SLP(gpc1-5, INPUT, DOWN); /* RCAM_AF_EEP_I2C_SDA */
+ PIN_SLP(gpc1-6, INPUT, DOWN); /* FCAM2_I2C_SCL */
+ PIN_SLP(gpc1-7, INPUT, DOWN); /* FCAM2_I2C_SDA */
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_06.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_06.dtsi
index 888d8795ca37..c10ce93b6fc4 100644
--- a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_06.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_06.dtsi
@@ -21,6 +21,7 @@
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpa1-4, NONE, LV1); /* BIXVY_KEY */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_07.dtsi b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_07.dtsi
index 888d8795ca37..c10ce93b6fc4 100644
--- a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_07.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte_kor_gpio_07.dtsi
@@ -21,6 +21,7 @@
initial0: initial-state {
PIN_IN(gpa1-2, NONE, LV1); /* SSP_MCU_INT1 */
PIN_IN(gpa1-3, NONE, LV1); /* SSP_MCU_INT2 */
+ PIN_IN(gpa1-4, NONE, LV1); /* BIXVY_KEY */
PIN_IN(gpq0-1, DOWN, LV1); /* NC */
};
};
diff --git a/arch/arm64/configs/exynos7885-jackpot2lte_defconfig b/arch/arm64/configs/exynos7885-jackpot2lte_defconfig
index 36449b334e2a..082a72243985 100644
--- a/arch/arm64/configs/exynos7885-jackpot2lte_defconfig
+++ b/arch/arm64/configs/exynos7885-jackpot2lte_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm64 4.4.148 Kernel Configuration
+# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR is not set
CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN=y
CONFIG_EXYNOS_DTBTOOL=y
@@ -4377,6 +4379,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
+CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set
diff --git a/arch/arm64/configs/exynos7885-jackpotlte_defconfig b/arch/arm64/configs/exynos7885-jackpotlte_defconfig
index e17c7d6c492c..ed4e8b91f127 100644
--- a/arch/arm64/configs/exynos7885-jackpotlte_defconfig
+++ b/arch/arm64/configs/exynos7885-jackpotlte_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm64 4.4.148 Kernel Configuration
+# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN=y
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR is not set
# CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN is not set
CONFIG_EXYNOS_DTBTOOL=y
@@ -4377,6 +4379,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
+CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set
diff --git a/arch/arm64/configs/exynos7885-jackpotltecan_defconfig b/arch/arm64/configs/exynos7885-jackpotltecan_defconfig
new file mode 100644
index 000000000000..57340e321a46
--- /dev/null
+++ b/arch/arm64/configs/exynos7885-jackpotltecan_defconfig
@@ -0,0 +1,5126 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm64 4.4.154 Kernel Configuration
+#
+CONFIG_ARM64=y
+CONFIG_64BIT=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_MMU=y
+CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+CONFIG_ARCH_MMAP_RND_BITS_MAX=24
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
+CONFIG_NO_IOPORT_MAP=y
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+# CONFIG_ZONE_DMA is not set
+CONFIG_HAVE_GENERIC_RCU_GUP=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_SMP=y
+CONFIG_SWIOTLB=y
+CONFIG_IOMMU_HELPER=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_PGTABLE_LEVELS=3
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_CROSS_MEMORY_ATTACH=y
+# CONFIG_FHANDLE is not set
+# CONFIG_USELIB is not set
+CONFIG_AUDIT=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_AUDIT_WATCH=y
+CONFIG_AUDIT_TREE=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+# CONFIG_NO_HZ_FULL is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+
+#
+# RCU Subsystem
+#
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_EXPERT is not set
+CONFIG_SRCU=y
+# CONFIG_TASKS_RCU is not set
+CONFIG_RCU_STALL_COMMON=y
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_RCU_EXPEDITE_BOOT is not set
+CONFIG_BUILD_BIN2C=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=20
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_PIDS is not set
+# CONFIG_CGROUP_DEVICE is not set
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_MEMCG is not set
+# CONFIG_CGROUP_PERF is not set
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+# CONFIG_BLK_CGROUP is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+# CONFIG_USER_NS is not set
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_RD_LZ4=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_HAVE_UID16=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_BPF=y
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+CONFIG_MULTIUSER=y
+# CONFIG_SGETMASK_SYSCALL is not set
+CONFIG_SYSFS_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_BPF_SYSCALL is not set
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_ADVISE_SYSCALLS=y
+# CONFIG_USERFAULTFD is not set
+CONFIG_MEMBARRIER=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLUB_CPU_PARTIAL=y
+# CONFIG_SYSTEM_DATA_VERIFICATION is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_JUMP_LABEL is not set
+# CONFIG_UPROBES is not set
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_RCU_TABLE_FREE=y
+CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
+CONFIG_HAVE_CMPXCHG_LOCAL=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_SECCOMP_FILTER=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+# CONFIG_CC_STACKPROTECTOR is not set
+CONFIG_CC_STACKPROTECTOR_NONE=y
+# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
+# CONFIG_CC_STACKPROTECTOR_STRONG is not set
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_ARCH_MMAP_RND_BITS=18
+CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_COMPAT_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+# CONFIG_MODULE_COMPRESS is not set
+CONFIG_MODULES_TREE_LOOKUP=y
+CONFIG_BLOCK=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+CONFIG_JOURNAL_DATA_TAG=y
+# CONFIG_BLK_CMDLINE_PARSER is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_AIX_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_CMDLINE_PARTITION is not set
+CONFIG_BLOCK_COMPAT=y
+CONFIG_BLOCK_SUPPORT_STLOG=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IOSCHED_FIFO=y
+CONFIG_IOSCHED_FIOPS=y
+CONFIG_IOSCHED_SIO=y
+CONFIG_IOSCHED_SIOPLUS=y
+CONFIG_IOSCHED_TRIPNDROID=y
+CONFIG_IOSCHED_VR=y
+CONFIG_IOSCHED_ZEN=y
+CONFIG_IOSCHED_ROW=y
+CONFIG_IOSCHED_BFQ=y
+CONFIG_IOSCHED_MAPLE=y
+# CONFIG_BFQ_GROUP_IOSCHED is not set
+# CONFIG_DEFAULT_NOOP is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_FIFO is not set
+# CONFIG_DEFAULT_FIOPS is not set
+# CONFIG_DEFAULT_SIO is not set
+# CONFIG_DEFAULT_SIOPLUS is not set
+# CONFIG_DEFAULT_TRIPNDROID is not set
+# CONFIG_DEFAULT_VR is not set
+# CONFIG_DEFAULT_ZEN is not set
+# CONFIG_DEFAULT_ROW is not set
+# CONFIG_DEFAULT_BFQ is not set
+# CONFIG_DEFAULT_MAPLE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_FREEZER=y
+
+#
+# Platform selection
+#
+# CONFIG_ARCH_BCM_IPROC is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_LAYERSCAPE is not set
+# CONFIG_ARCH_HISI is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_ROCKCHIP is not set
+# CONFIG_ARCH_SEATTLE is not set
+# CONFIG_ARCH_STRATIX10 is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_SPRD is not set
+# CONFIG_ARCH_THUNDER is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_XGENE is not set
+# CONFIG_ARCH_ZYNQMP is not set
+
+#
+# Samsung Exynos
+#
+CONFIG_ARCH_EXYNOS=y
+# CONFIG_SOC_EXYNOS7872 is not set
+# CONFIG_SOC_EMULATOR7872 is not set
+CONFIG_SOC_EXYNOS7885=y
+# CONFIG_SOC_EXYNOS7885_ANDROID_VERSION_O is not set
+# CONFIG_SOC_EXYNOS7884 is not set
+# CONFIG_SOC_EXYNOS7883 is not set
+# CONFIG_SOC_EXYNOS7884A is not set
+CONFIG_ARCH_EXYNOS7=y
+# CONFIG_SOC_EXYNOS8890 is not set
+# CONFIG_SOC_EXYNOS8895 is not set
+# CONFIG_SOC_EMULATOR8895 is not set
+# CONFIG_ARCH_EXYNOS8 is not set
+# CONFIG_ZONE_MOVABLE is not set
+
+#
+# SAMSUNG EXYNOS SoCs Support
+#
+# CONFIG_MACH_EXYNOS7885_NONE is not set
+CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN=y
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN is not set
+CONFIG_EXYNOS_DTBTOOL=y
+CONFIG_EXYNOS_DTBH_PLATFORM_CODE=0x50a6
+CONFIG_EXYNOS_DTBH_SUBTYPE_CODE=0x217584da
+CONFIG_EXYNOS_DTBH_PAGE_SIZE=2048
+
+#
+# Bus support
+#
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_DOMAINS_GENERIC is not set
+# CONFIG_PCI_SYSCALL is not set
+
+#
+# Kernel Features
+#
+
+#
+# ARM errata workarounds via the alternatives framework
+#
+CONFIG_ARM64_ERRATUM_826319=y
+CONFIG_ARM64_ERRATUM_827319=y
+CONFIG_ARM64_ERRATUM_824069=y
+CONFIG_ARM64_ERRATUM_819472=y
+CONFIG_ARM64_ERRATUM_832075=y
+CONFIG_ARM64_ERRATUM_845719=y
+CONFIG_ARM64_ERRATUM_843419=y
+CONFIG_CAVIUM_ERRATUM_22375=y
+CONFIG_CAVIUM_ERRATUM_23154=y
+CONFIG_ARM64_4K_PAGES=y
+# CONFIG_ARM64_16K_PAGES is not set
+# CONFIG_ARM64_64K_PAGES is not set
+CONFIG_ARM64_VA_BITS_39=y
+# CONFIG_ARM64_VA_BITS_48 is not set
+CONFIG_ARM64_VA_BITS=39
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SCHED_MC=y
+# CONFIG_SCHED_SMT is not set
+CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE=y
+CONFIG_SCHED_HMP=y
+# CONFIG_SCHED_HMP_PRIO_FILTER is not set
+CONFIG_HMP_FAST_CPU_MASK="6-7"
+CONFIG_HMP_SLOW_CPU_MASK="0-5"
+CONFIG_HMP_VARIABLE_SCALE=y
+CONFIG_HMP_FREQUENCY_INVARIANT_SCALE=y
+# CONFIG_SCHED_HMP_LITTLE_PACKING is not set
+CONFIG_SCHED_HMP_TASK_BASED_SOFTLANDING=y
+CONFIG_SCHED_HMP_SELECTIVE_BOOST_WITH_NITP=y
+CONFIG_SCHED_SKIP_CORE_SELECTION_MASK=y
+CONFIG_NR_CPUS=8
+CONFIG_NR_CLUSTERS=3
+CONFIG_HOTPLUG_CPU=y
+CONFIG_RELOCATABLE_KERNEL=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_NO_BOOTMEM=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+# CONFIG_CLEANCACHE is not set
+CONFIG_FRONTSWAP=y
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=7
+CONFIG_ZSWAP=y
+CONFIG_ZSWAP_MIGRATION_SUPPORT=y
+# CONFIG_ZSWAP_ENABLE_WRITEBACK is not set
+# CONFIG_ZSWAP_SAME_PAGE_SHARING is not set
+CONFIG_ZPOOL=y
+# CONFIG_ZBUD is not set
+CONFIG_ZSMALLOC=y
+CONFIG_PGTABLE_MAPPING=y
+CONFIG_ZSMALLOC_STAT=y
+CONFIG_DIRECT_RECLAIM_FILE_PAGES_ONLY=y
+CONFIG_INCREASE_MAXIMUM_SWAPPINESS=y
+CONFIG_FIX_INACTIVE_RATIO=y
+CONFIG_TIGHT_PGDAT_BALANCE=y
+# CONFIG_SWAP_ENABLE_READAHEAD is not set
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_HPA=y
+# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_FRAME_VECTOR=y
+CONFIG_MMAP_READAROUND_LIMIT=0
+# CONFIG_BALANCE_ANON_FILE_RECLAIM is not set
+CONFIG_SECCOMP=y
+# CONFIG_XEN is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ARMV8_DEPRECATED=y
+CONFIG_SWP_EMULATION=y
+CONFIG_CP15_BARRIER_EMULATION=y
+CONFIG_SETEND_EMULATION=y
+
+#
+# ARMv8.1 architectural features
+#
+CONFIG_ARM64_HW_AFDBM=y
+CONFIG_ARM64_PAN=y
+# CONFIG_ARM64_LSE_ATOMICS is not set
+
+#
+# Boot options
+#
+CONFIG_CMDLINE=""
+# CONFIG_EFI is not set
+# CONFIG_TIMA is not set
+# CONFIG_TIMA_LKMAUTH is not set
+# CONFIG_TIMA_LKM_BLOCK is not set
+# CONFIG_TIMA_LKMAUTH_CODE_PROT is not set
+# CONFIG_UH is not set
+# CONFIG_UH_RKP is not set
+# CONFIG_UH_RKP_6G is not set
+# CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_COMPAT_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_SCRIPT=y
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_COREDUMP=y
+CONFIG_COMPAT=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_SUSPEND_SKIP_SYNC is not set
+CONFIG_WAKELOCK=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PM_WAKELOCKS_GC=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_DPM_WATCHDOG is not set
+CONFIG_PM_OPP=y
+CONFIG_PM_CLK=y
+CONFIG_PM_GENERIC_DOMAINS=y
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_CPU_PM=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_BOEFFLA_WL_BLOCKER=y
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Idle
+#
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_DT_IDLE_STATES=y
+
+#
+# ARM CPU Idle Drivers
+#
+# CONFIG_ARM_CPUIDLE is not set
+CONFIG_ARM64_EXYNOS_CPUIDLE=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ALUCARD is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_BARRY_ALLEN is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_BIOSHOCK is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_BLU_ACTIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CULTIVATION is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_DANCEDANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_DARKNESS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ELECTRODEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_HYPER is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_IMPULSE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTELLIACTIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTELLIDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTELLIMM is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_IRONACTIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_LIONHEART is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_NIGHTMARE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMANDPLUS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND_X is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PEGASUSQ is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_SMARTMAX is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_SMARTMAX_EPS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_WHEATLEY is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_YANKACTIVE is not set
+CONFIG_CPU_FREQ_GOV_ALUCARD=y
+CONFIG_CPU_FREQ_GOV_BARRY_ALLEN=y
+CONFIG_CPU_FREQ_GOV_BIOSHOCK=y
+CONFIG_CPU_FREQ_GOV_BLU_ACTIVE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_CULTIVATION=y
+CONFIG_CPU_FREQ_GOV_DANCEDANCE=y
+CONFIG_CPU_FREQ_GOV_DARKNESS=y
+CONFIG_CPU_FREQ_GOV_ELECTRODEMAND=y
+CONFIG_CPU_FREQ_GOV_HYPER=y
+CONFIG_CPU_FREQ_GOV_IMPULSE=y
+CONFIG_CPU_FREQ_GOV_INTELLIACTIVE=y
+CONFIG_CPU_FREQ_GOV_INTELLIDEMAND=y
+CONFIG_CPU_FREQ_GOV_INTELLIMM=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_IRONACTIVE=y
+CONFIG_CPU_FREQ_GOV_LIONHEART=y
+CONFIG_CPU_FREQ_GOV_NIGHTMARE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_ONDEMANDPLUS=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND_X=y
+CONFIG_CPU_FREQ_GOV_PEGASUSQ=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_SMARTMAX=y
+CONFIG_CPU_FREQ_GOV_SMARTMAX_EPS=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_WHEATLEY=y
+CONFIG_CPU_FREQ_GOV_YANKACTIVE=y
+CONFIG_CPU_INDEX_QOS_CLUSTER0=0
+CONFIG_CPU_INDEX_QOS_CLUSTER1=6
+
+#
+# CPU frequency scaling drivers
+#
+CONFIG_CPUFREQ_DT=y
+# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
+# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
+CONFIG_ARM_EXYNOS_ACME=y
+CONFIG_NET=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+CONFIG_NET_INGRESS=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=y
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_FIB_TRIE_STATS is not set
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+CONFIG_NET_UDP_TUNNEL=y
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+CONFIG_TCP_CONG_HSTCP=y
+CONFIG_TCP_CONG_HYBLA=y
+CONFIG_TCP_CONG_VEGAS=y
+CONFIG_TCP_CONG_SCALABLE=y
+CONFIG_TCP_CONG_LP=y
+CONFIG_TCP_CONG_VENO=y
+CONFIG_TCP_CONG_YEAH=y
+CONFIG_TCP_CONG_ILLINOIS=y
+CONFIG_TCP_CONG_DCTCP=y
+CONFIG_TCP_CONG_LIA=y
+CONFIG_TCP_CONG_OLIA=y
+CONFIG_TCP_CONG_WVEGAS=y
+CONFIG_TCP_CONG_BALIA=y
+CONFIG_TCP_CONG_CDG=y
+# CONFIG_DEFAULT_ADVANCED is not set
+CONFIG_DEFAULT_BIC=y
+# CONFIG_DEFAULT_CUBIC is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_HSTCP is not set
+# CONFIG_DEFAULT_HYBLA is not set
+# CONFIG_DEFAULT_VEGAS is not set
+# CONFIG_DEFAULT_SCALABLE is not set
+# CONFIG_DEFAULT_LP is not set
+# CONFIG_DEFAULT_VENO is not set
+# CONFIG_DEFAULT_YEAH is not set is not set
+# CONFIG_DEFAULT_ILLINOIS is not set
+# CONFIG_DEFAULT_DCTCP is not set is not set
+# CONFIG_DEFAULT_LIA is not set
+# CONFIG_DEFAULT_OLIA is not set
+# CONFIG_DEFAULT_WVEGAS is not set
+# CONFIG_DEFAULT_BALIA is not set
+# CONFIG_DEFAULT_CDG is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="bic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+# CONFIG_IPV6_ILA is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+# CONFIG_IPV6_VTI is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=y
+# CONFIG_IPV6_GRE is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+# CONFIG_IPV6_SUBTREES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETLABEL is not set
+CONFIG_MPTCP=y
+# CONFIG_MPTCP_PM_ADVANCED is not set
+CONFIG_DEFAULT_MPTCP_PM="default"
+# CONFIG_MPTCP_SCHED_ADVANCED is not set
+CONFIG_DEFAULT_MPTCP_SCHED="default"
+CONFIG_ANDROID_PARANOID_NETWORK=y
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NET_PTP_CLASSIFY is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_WIREGUARD=y
+# CONFIG_WIREGUARD_DEBUG is not set
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_INGRESS=y
+CONFIG_NETFILTER_NETLINK=y
+# CONFIG_NETFILTER_NETLINK_ACCT is not set
+CONFIG_NETFILTER_NETLINK_QUEUE=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_LOG_COMMON=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_PROCFS=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
+CONFIG_NF_CONNTRACK_LABELS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_GRE=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_BROADCAST=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+# CONFIG_NF_CONNTRACK_SNMP is not set
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+# CONFIG_NF_CONNTRACK_SIP is not set
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set
+CONFIG_NF_NAT=y
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_PROTO_DCCP=y
+CONFIG_NF_NAT_PROTO_UDPLITE=y
+CONFIG_NF_NAT_PROTO_SCTP=y
+CONFIG_NF_NAT_AMANDA=y
+CONFIG_NF_NAT_FTP=y
+CONFIG_NF_NAT_IRC=y
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_NF_NAT_TFTP=y
+CONFIG_NF_NAT_REDIRECT=y
+# CONFIG_NF_TABLES is not set
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=y
+CONFIG_NETFILTER_XT_CONNMARK=y
+
+#
+# Xtables targets
+#
+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_NAT=y
+CONFIG_NETFILTER_XT_TARGET_NETMAP=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+
+#
+# Xtables matches
+#
+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_BPF is not set
+# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+# CONFIG_NETFILTER_XT_MATCH_CPU is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ECN=y
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_HL=y
+# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_ONESHOT=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+# CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG_32BIT is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_HISTORY=y
+# CONFIG_IP_SET is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_NF_DUP_IPV4 is not set
+# CONFIG_NF_LOG_ARP is not set
+CONFIG_NF_LOG_IPV4=y
+CONFIG_NF_REJECT_IPV4=y
+CONFIG_NF_NAT_IPV4=y
+CONFIG_NF_NAT_MASQUERADE_IPV4=y
+CONFIG_NF_NAT_PROTO_GRE=y
+CONFIG_NF_NAT_PPTP=y
+CONFIG_NF_NAT_H323=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_RPFILTER=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+# CONFIG_IP_NF_TARGET_SYNPROXY is not set
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+CONFIG_IP_NF_TARGET_TTL=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV6=y
+CONFIG_NF_CONNTRACK_IPV6=y
+# CONFIG_NF_DUP_IPV6 is not set
+CONFIG_NF_REJECT_IPV6=y
+CONFIG_NF_LOG_IPV6=y
+CONFIG_NF_NAT_IPV6=y
+CONFIG_NF_NAT_MASQUERADE_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
+# CONFIG_IP6_NF_MATCH_FRAG is not set
+# CONFIG_IP6_NF_MATCH_OPTS is not set
+# CONFIG_IP6_NF_MATCH_HL is not set
+# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
+# CONFIG_IP6_NF_MATCH_MH is not set
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+# CONFIG_IP6_NF_MATCH_RT is not set
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+# CONFIG_IP6_NF_SECURITY is not set
+CONFIG_IP6_NF_NAT=y
+CONFIG_IP6_NF_TARGET_MASQUERADE=y
+# CONFIG_IP6_NF_TARGET_NPT is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+CONFIG_HAVE_NET_DSA=y
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+CONFIG_PHONET=y
+# CONFIG_6LOWPAN is not set
+# CONFIG_IEEE802154 is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+CONFIG_NET_SCH_HTB=y
+# CONFIG_NET_SCH_HFSC is not set
+CONFIG_NET_SCH_PRIO=y
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFB is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+# CONFIG_NET_SCH_MQPRIO is not set
+# CONFIG_NET_SCH_CHOKE is not set
+# CONFIG_NET_SCH_QFQ is not set
+# CONFIG_NET_SCH_CODEL is not set
+# CONFIG_NET_SCH_FQ_CODEL is not set
+# CONFIG_NET_SCH_FQ is not set
+# CONFIG_NET_SCH_HHF is not set
+# CONFIG_NET_SCH_PIE is not set
+CONFIG_NET_SCH_INGRESS=y
+# CONFIG_NET_SCH_PLUG is not set
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=y
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+CONFIG_NET_CLS_U32=y
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CLS_U32_MARK is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_CLS_CGROUP is not set
+# CONFIG_NET_CLS_BPF is not set
+# CONFIG_NET_CLS_FLOWER is not set
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+# CONFIG_NET_EMATCH_CMP is not set
+# CONFIG_NET_EMATCH_NBYTE is not set
+CONFIG_NET_EMATCH_U32=y
+# CONFIG_NET_EMATCH_META is not set
+# CONFIG_NET_EMATCH_TEXT is not set
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+# CONFIG_GACT_PROB is not set
+CONFIG_NET_ACT_MIRRED=y
+# CONFIG_NET_ACT_IPT is not set
+# CONFIG_NET_ACT_NAT is not set
+# CONFIG_NET_ACT_PEDIT is not set
+# CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
+# CONFIG_NET_ACT_CSUM is not set
+# CONFIG_NET_ACT_VLAN is not set
+# CONFIG_NET_ACT_BPF is not set
+# CONFIG_NET_ACT_CONNMARK is not set
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+# CONFIG_DNS_RESOLVER is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_NETLINK_MMAP is not set
+# CONFIG_NETLINK_DIAG is not set
+# CONFIG_MPLS is not set
+# CONFIG_HSR is not set
+# CONFIG_NET_SWITCHDEV is not set
+# CONFIG_NET_L3_MASTER_DEV is not set
+# CONFIG_KNOX_NCM is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+# CONFIG_CGROUP_NET_PRIO is not set
+# CONFIG_CGROUP_NET_CLASSID is not set
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+CONFIG_NET_FLOW_LIMIT=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_DEBUGFS is not set
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_CFG80211_REG_NOT_UPDATED=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_RFKILL_REGULATOR is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+# CONFIG_NFC_PN533 is not set
+# CONFIG_NFC_SIM is not set
+CONFIG_SAMSUNG_NFC=y
+CONFIG_ESE_P3_LSI=y
+CONFIG_ESE_SECURE=y
+CONFIG_ESE_SECURE_SPI_PORT=0
+CONFIG_ESE_SECURE_GPIO=""
+CONFIG_SEC_NFC=y
+CONFIG_SEC_NFC_PRODUCT_N5=y
+CONFIG_SEC_NFC_IF_I2C=y
+# CONFIG_LWTUNNEL is not set
+CONFIG_HAVE_BPF_JIT=y
+# CONFIG_CLTCP is not set
+
+#
+# Device Drivers
+#
+CONFIG_ARM_AMBA=y
+# CONFIG_TEGRA_AHB is not set
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+# CONFIG_DEVTMPFS_MOUNT is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+CONFIG_ALLOW_DEV_COREDUMP=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_SOC_BUS=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_DMA_SHARED_BUFFER=y
+# CONFIG_FENCE_TRACE is not set
+CONFIG_DMA_CMA=y
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=20
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+
+#
+# Bus devices
+#
+# CONFIG_ARM_CCI400_PMU is not set
+# CONFIG_ARM_CCI500_PMU is not set
+# CONFIG_ARM_CCI550_DEBUG_MODE is not set
+# CONFIG_ARM_CCN is not set
+# CONFIG_VEXPRESS_CONFIG is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_RESERVED_MEM=y
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_ZRAM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_RBD is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_BMP085_SPI is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_SRAM is not set
+CONFIG_UID_SYS_STATS=y
+# CONFIG_UID_SYS_STATS_DEBUG is not set
+# CONFIG_TIMA_LOG is not set
+# CONFIG_KNOX_KAP is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_93XX46 is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+
+#
+# Intel MIC Bus Driver
+#
+
+#
+# SCIF Bus Driver
+#
+
+#
+# Intel MIC Host Driver
+#
+
+#
+# Intel MIC Card Driver
+#
+
+#
+# SCIF Driver
+#
+
+#
+# Intel MIC Coprocessor State Management (COSM) Drivers
+#
+# CONFIG_ECHO is not set
+# CONFIG_CXL_BASE is not set
+# CONFIG_CXL_KERNEL_API is not set
+# CONFIG_CXL_EEH is not set
+CONFIG_MCU_IPC=y
+# CONFIG_MCU_IPC_TEST is not set
+CONFIG_SHM_IPC=y
+CONFIG_USIM_DETECT=y
+CONFIG_SEC_SIPC_MODEM_IF=y
+CONFIG_SEC_MODEM_SS310AP=y
+# CONFIG_CP_ZEROCOPY is not set
+
+#
+# Configuration Description
+#
+# CONFIG_BOOT_DEVICE_SPI is not set
+# CONFIG_LINK_DEVICE_MEMORY is not set
+# CONFIG_LINK_POWER_MANAGEMENT is not set
+# CONFIG_LINK_DEVICE_WITH_SBD_ARCH is not set
+# CONFIG_LINK_DEVICE_NAPI is not set
+# CONFIG_LINK_DEVICE_C2C is not set
+# CONFIG_LINK_DEVICE_LLI is not set
+CONFIG_LINK_DEVICE_SHMEM=y
+# CONFIG_LINK_DEVICE_HSIC is not set
+# CONFIG_LTE_MODEM_XMM7260 is not set
+CONFIG_UMTS_MODEM_SS310AP=y
+# CONFIG_DEBUG_PKTLOG is not set
+# CONFIG_LINK_CONTROL_MSG_IOSM is not set
+CONFIG_CP_SECURE_BOOT=y
+# CONFIG_GPIO_DS_DETECT is not set
+CONFIG_CP_RAM_LOGGING=y
+CONFIG_CP_UART_NOTI=y
+CONFIG_HW_REV_DETECT=y
+CONFIG_PMU_UART_SWITCH=y
+# CONFIG_FREE_CP_RSVD_MEMORY is not set
+# CONFIG_MODEM_IF_LEGACY_QOS is not set
+CONFIG_MODEM_IF_QOS=y
+CONFIG_GNSS_SHMEM_IF=y
+# CONFIG_GPIO_DEBUG is not set
+CONFIG_SCSC_CORE_CM=y
+CONFIG_SCSC_CORE=y
+CONFIG_SCSC_CORE_FW_LOCATION="/system/etc/wifi"
+CONFIG_SCSC_CORE_FW_LOCATION_AUTO="y"
+CONFIG_SCSC_CORE_TOOL_LOCATION="/system/bin"
+CONFIG_SCSC_WLBTD=y
+CONFIG_SCSC_PLATFORM=y
+# CONFIG_SCSC_CM_MX_CLIENT_TEST is not set
+# CONFIG_SCSC_CLK20MHZ is not set
+CONFIG_SCSC_MMAP=y
+# CONFIG_SCSC_DBG_SAMPLER is not set
+CONFIG_SCSC_DEBUG=y
+CONFIG_SCSC_DEBUG_COMPATIBILITY=y
+CONFIG_SCSC_STATIC_RING=y
+CONFIG_SCSC_STATIC_RING_SIZE=4194304
+# CONFIG_SCSC_CHV_SUPPORT is not set
+# CONFIG_SCSC_GPR4_CON_DEBUG is not set
+CONFIG_SCSC_BUILD_TYPE="User"
+CONFIG_SCSC_WIFILOGGER=y
+CONFIG_SCSC_WIFILOGGER_DEBUGFS=y
+# CONFIG_SCSC_WIFILOGGER_TEST is not set
+# CONFIG_SCSC_MX150_EXT_DUAL_FEM is not set
+CONFIG_SCSC_BT=y
+# CONFIG_SCSC_BT_BLUEZ is not set
+CONFIG_SCSC_ANT=y
+# CONFIG_SAMSUNG_KIC is not set
+# CONFIG_TZDEV is not set
+
+#
+# NOTIFIER configs
+#
+CONFIG_VBUS_NOTIFIER=y
+
+#
+# MUIC configs
+#
+CONFIG_USE_MUIC=y
+# CONFIG_USE_SAFEOUT is not set
+CONFIG_MUIC_NOTIFIER=y
+CONFIG_MUIC_MANAGER=y
+# CONFIG_MUIC_HV is not set
+CONFIG_MUIC_SUPPORT_CCIC=y
+CONFIG_MUIC_S2MU004=y
+CONFIG_HV_MUIC_S2MU004_AFC=y
+CONFIG_HICCUP_CHARGER=y
+# CONFIG_CP_UART_SWITCH is not set
+# CONFIG_NEW_FACTORY_JIGONB is not set
+# CONFIG_MUIC_INCOMPATIBLE_VZW is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_UFS_SRPMB is not set
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_MQ_DEFAULT is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_HAVE_PATA_PLATFORM=y
+# CONFIG_ATA is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_BCACHE is not set
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_MQ_DEFAULT is not set
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_BUFIO=y
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_THIN_PROVISIONING is not set
+# CONFIG_DM_CACHE is not set
+# CONFIG_DM_ERA is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_RAID is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+CONFIG_DM_UEVENT=y
+# CONFIG_DM_FLAKEY is not set
+# CONFIG_DM_VERITY is not set
+# CONFIG_DM_VERITY_FEC is not set
+# CONFIG_DM_SWITCH is not set
+# CONFIG_DM_LOG_WRITES is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_IFB is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_IPVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+CONFIG_TUN=y
+# CONFIG_TUN_VNET_CROSS_LE is not set
+# CONFIG_VETH is not set
+# CONFIG_NLMON is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+CONFIG_ETHERNET=y
+# CONFIG_ALTERA_TSE is not set
+CONFIG_NET_VENDOR_AMD=y
+# CONFIG_AMD_XGBE is not set
+CONFIG_NET_VENDOR_ARC=y
+# CONFIG_ARC_EMAC is not set
+# CONFIG_EMAC_ROCKCHIP is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+CONFIG_NET_CADENCE=y
+# CONFIG_MACB is not set
+CONFIG_NET_VENDOR_BROADCOM=y
+# CONFIG_B44 is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_SYSTEMPORT is not set
+# CONFIG_DNET is not set
+CONFIG_NET_VENDOR_EZCHIP=y
+# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
+CONFIG_NET_VENDOR_HISILICON=y
+# CONFIG_HIX5HD2_GMAC is not set
+# CONFIG_HIP04_ETH is not set
+# CONFIG_HNS is not set
+# CONFIG_HNS_DSAF is not set
+# CONFIG_HNS_ENET is not set
+CONFIG_NET_VENDOR_INTEL=y
+CONFIG_NET_VENDOR_I825XX=y
+CONFIG_NET_VENDOR_MARVELL=y
+# CONFIG_MVMDIO is not set
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NET_VENDOR_MICROCHIP=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+CONFIG_NET_VENDOR_NATSEMI=y
+CONFIG_NET_VENDOR_8390=y
+# CONFIG_ETHOC is not set
+CONFIG_NET_VENDOR_QUALCOMM=y
+# CONFIG_QCA7000 is not set
+CONFIG_NET_VENDOR_RENESAS=y
+CONFIG_NET_VENDOR_ROCKER=y
+CONFIG_NET_VENDOR_SAMSUNG=y
+# CONFIG_SXGBE_ETH is not set
+CONFIG_NET_VENDOR_SEEQ=y
+CONFIG_NET_VENDOR_SMSC=y
+# CONFIG_SMC91X is not set
+# CONFIG_SMSC911X is not set
+CONFIG_NET_VENDOR_STMICRO=y
+# CONFIG_STMMAC_ETH is not set
+CONFIG_NET_VENDOR_SYNOPSYS=y
+# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set
+CONFIG_NET_VENDOR_VIA=y
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_VELOCITY is not set
+CONFIG_NET_VENDOR_WIZNET=y
+# CONFIG_WIZNET_W5100 is not set
+# CONFIG_WIZNET_W5300 is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_AQUANTIA_PHY is not set
+# CONFIG_AT803X_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_TERANETICS_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM7XXX_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+# CONFIG_MICROCHIP_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BCM_UNIMAC is not set
+# CONFIG_MICREL_KS8995MA is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_MPPE=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPPOE is not set
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+# CONFIG_PPP_ASYNC is not set
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+CONFIG_USB_NET_DRIVERS=y
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+CONFIG_USB_RTL8150=y
+CONFIG_USB_RTL8152=y
+# CONFIG_USB_LAN78XX is not set
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_AX88179_178A=y
+CONFIG_USB_NET_CDCETHER=y
+CONFIG_USB_NET_CDC_EEM=y
+CONFIG_USB_NET_CDC_NCM=y
+# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
+CONFIG_USB_NET_CDC_MBIM=y
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SR9700 is not set
+# CONFIG_USB_NET_SR9800 is not set
+CONFIG_USB_NET_SMSC75XX=y
+CONFIG_USB_NET_SMSC95XX=y
+# CONFIG_USB_NET_GL620A is not set
+CONFIG_USB_NET_NET1080=y
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+CONFIG_USB_NET_CDC_SUBSET=y
+# CONFIG_USB_ALI_M5632 is not set
+# CONFIG_USB_AN2720 is not set
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_KC2190 is not set
+CONFIG_USB_NET_ZAURUS=y
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_KALMIA is not set
+# CONFIG_USB_NET_QMI_WWAN is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_CDC_PHONET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_USB_SIERRA_NET is not set
+# CONFIG_USB_VL600 is not set
+# CONFIG_USB_NET_CH9200 is not set
+CONFIG_WLAN=y
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_ATH_CARDS is not set
+# CONFIG_BRCMFMAC is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_WL_MEDIATEK is not set
+# CONFIG_WL_TI is not set
+# CONFIG_MWIFIEX is not set
+CONFIG_SCSC_WLAN=y
+CONFIG_SCSC_WLAN_KEY_MGMT_OFFLOAD=y
+# CONFIG_SCSC_WLAN_HIP4_PROFILING is not set
+# CONFIG_SCSC_WLAN_DEBUG is not set
+CONFIG_SCSC_WLAN_SG=y
+# CONFIG_SCSC_WLAN_SKB_TRACKING is not set
+# CONFIG_SCSC_WLAN_OFFLINE_TRACE is not set
+# CONFIG_SCSC_WLAN_RX_NAPI is not set
+CONFIG_SCSC_WLAN_PSCHED_AMSDU=y
+CONFIG_SCSC_WLAN_ANDROID=y
+# CONFIG_SCSC_WLAN_STA_ONLY is not set
+CONFIG_SCSC_WLAN_HIP_SUPPORT_SCATTER_GATHER_API=y
+CONFIG_SCSC_WLAN_GSCAN_ENABLE=y
+CONFIG_SCSC_WLAN_WES_NCHO=y
+# CONFIG_SCSC_WLAN_MUTEX_DEBUG is not set
+# CONFIG_CONFIG_SCSC_WLAN_BLOCK_IPV6 is not set
+# CONFIG_CONFIG_SCSC_WLAN_DISABLE_NAT_KA is not set
+# CONFIG_SCSC_WLAN_HANG_TEST is not set
+# CONFIG_SCSC_WLAN_NAT_KEEPALIVE_DISABLE is not set
+CONFIG_SCSC_WLAN_ENHANCED_LOGGING=y
+CONFIG_SCSC_WLAN_MAC_ADDRESS_FILENAME="/efs/wifi/.mac.info"
+CONFIG_SCSC_WLAN_MAX_INTERFACES=3
+CONFIG_SCSC_WLAN_AP_INFO_FILE=y
+# CONFIG_SCSC_WLAN_WIFI_SHARING is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_ISDN is not set
+# CONFIG_NVM is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_LEDS=y
+CONFIG_INPUT_FF_MEMLESS=y
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+CONFIG_INPUT_MATRIXKMAP=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+CONFIG_INPUT_KEYRESET=y
+# CONFIG_GLOVE_TOUCH is not set
+CONFIG_INPUT_TOUCHSCREEN_TCLM=y
+# CONFIG_INPUT_TOUCHSCREEN_TCLMV2 is not set
+CONFIG_INPUT_KEYCOMBO=y
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_TOUCHKEY_LIGHT_EFS is not set
+CONFIG_TOUCHKEY_GRIP=y
+# CONFIG_KEYBOARD_ABOV_TOUCH is not set
+# CONFIG_KEYBOARD_ABOV_TOUCH_FT1804 is not set
+# CONFIG_KEYBOARD_ABOV_TOUCH_T316 is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+CONFIG_KEYBOARD_SAMSUNG=y
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_BCM is not set
+CONFIG_KEYBOARD_ABOV_TOUCH_3X6=y
+# CONFIG_KEYBOARD_TC300K is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+# CONFIG_JOYSTICK_IFORCE is not set
+# CONFIG_JOYSTICK_WARRIOR is not set
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_AS5011 is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+# CONFIG_TABLET_SERIAL_WACOM4 is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_PROPERTIES=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_EGALAX is not set
+# CONFIG_TOUCHSCREEN_FT6236 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELAN is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MMS144 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_TSC2004 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_ZFORCE is not set
+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
+# CONFIG_TOUCHSCREEN_MXT540E is not set
+CONFIG_TOUCHSCREEN_DUMP_MODE=y
+# CONFIG_TOUCHSCREEN_ZINITIX_BT532 is not set
+# CONFIG_TOUCHSCREEN_ZINITIX_BT541C is not set
+# CONFIG_TOUCHSCREEN_ZINITIX_ZT75XX is not set
+# CONFIG_TOUCHSCREEN_ZINITIX_ZT75XX_TCLM is not set
+CONFIG_TOUCHSCREEN_SEC_TS=y
+CONFIG_TOUCHSCREEN_SEC_TS_GLOVEMODE=y
+# CONFIG_TOUCHSCREEN_SEC_INCELL_TS is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_TD4X00 is not set
+# CONFIG_TOUCHSCREEN_MELFAS_MMS438 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_E3X0_BUTTON is not set
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_MPU3050 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_BEEPER is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+CONFIG_INPUT_KEYCHORD=y
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+CONFIG_INPUT_UINPUT=y
+CONFIG_INPUT_GPIO=y
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_IMS_PCU is not set
+# CONFIG_INPUT_CMA3000 is not set
+# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
+# CONFIG_INPUT_DRV260X_HAPTICS is not set
+# CONFIG_INPUT_DRV2665_HAPTICS is not set
+# CONFIG_INPUT_DRV2667_HAPTICS is not set
+CONFIG_FLIP_COVER=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_AMBAKMI is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_USERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+# CONFIG_VT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_EARLYCON=y
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=16
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=2
+CONFIG_SERIAL_SAMSUNG_HWACG=y
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_HW_RANDOM_EXYNOS is not set
+CONFIG_HW_RANDOM_EXYNOS_SWD=y
+CONFIG_EXYRNG_FIPS_COMPLIANCE=y
+# CONFIG_EXYRNG_FAIL_POLICY_DISABLE is not set
+CONFIG_EXYRNG_FAIL_POLICY_RESET=y
+CONFIG_EXYRNG_USE_CRYPTOMANAGER=y
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_XILLYBUS is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+
+#
+# Multiplexer I2C Chip support
+#
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_MUX_GPIO is not set
+# CONFIG_I2C_MUX_PCA9541 is not set
+# CONFIG_I2C_MUX_PCA954x is not set
+# CONFIG_I2C_MUX_PINCTRL is not set
+# CONFIG_I2C_MUX_REG is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CADENCE is not set
+# CONFIG_I2C_CBUS_GPIO is not set
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_EMEV2 is not set
+CONFIG_I2C_EXYNOS5=y
+CONFIG_I2C_SAMSUNG_HWACG=y
+CONFIG_EXYNOS_SPEEDY=y
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_RK3X is not set
+CONFIG_HAVE_S3C2410_I2C=y
+CONFIG_I2C_S3C2410=y
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_FSL_SPI is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PL022 is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_ROCKCHIP is not set
+CONFIG_SPI_S3C64XX=y
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+CONFIG_SENSORS_FP_SPI_NUMBER=1
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_SPMI is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+# CONFIG_PTP_1588_CLOCK is not set
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+CONFIG_PINCTRL=y
+
+#
+# Pin controllers
+#
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+# CONFIG_DEBUG_PINCTRL is not set
+# CONFIG_PINCTRL_AMD is not set
+# CONFIG_PINCTRL_SINGLE is not set
+CONFIG_PINCTRL_SAMSUNG=y
+CONFIG_PINCTRL_EXYNOS=y
+# CONFIG_SEC_GPIO_DVS is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_OF_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO drivers
+#
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_DWAPB is not set
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_GRGPIO is not set
+# CONFIG_GPIO_PL061 is not set
+# CONFIG_GPIO_SYSCON is not set
+# CONFIG_GPIO_XGENE is not set
+# CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_ZX is not set
+
+#
+# I2C GPIO expanders
+#
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+
+#
+# MFD GPIO expanders
+#
+
+#
+# SPI GPIO expanders
+#
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# SPI or I2C GPIO expanders
+#
+# CONFIG_GPIO_MCP23S08 is not set
+
+#
+# USB GPIO expanders
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27XXX is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_BQ24190 is not set
+# CONFIG_CHARGER_BQ24257 is not set
+# CONFIG_CHARGER_BQ24735 is not set
+# CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+# CONFIG_CHARGER_RT9455 is not set
+CONFIG_POWER_RESET=y
+# CONFIG_POWER_RESET_GPIO is not set
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+# CONFIG_POWER_RESET_LTC2952 is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_RESET_XGENE is not set
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_POWER_AVS is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_IIO_HWMON is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_POWR1220 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LTC2945 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4222 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4260 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MAX31790 is not set
+# CONFIG_SENSORS_HTU21 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_NCT6683 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_PWM_FAN is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SHTC1 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH56XX_COMMON is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_ADC128D818 is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_TC74 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP103 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_SENSORS_SEC_THERMISTOR=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
+# CONFIG_THERMAL_WRITABLE_TRIPS is not set
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+# CONFIG_THERMAL_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
+CONFIG_CPU_THERMAL=y
+# CONFIG_CLOCK_THERMAL is not set
+# CONFIG_DEVFREQ_THERMAL is not set
+CONFIG_GPU_THERMAL=y
+# CONFIG_ISP_THERMAL is not set
+CONFIG_THERMAL_EMULATION=y
+# CONFIG_IMX_THERMAL is not set
+
+#
+# Samsung thermal drivers
+#
+CONFIG_EXYNOS_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_GPIO_WATCHDOG is not set
+# CONFIG_XILINX_WATCHDOG is not set
+# CONFIG_ARM_SP805_WATCHDOG is not set
+# CONFIG_CADENCE_WATCHDOG is not set
+CONFIG_HAVE_S3C2410_WATCHDOG=y
+CONFIG_S3C2410_WATCHDOG=y
+# CONFIG_DW_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
+# CONFIG_BCM7038_WDT is not set
+# CONFIG_MEN_A21_WDT is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_BCM590XX is not set
+# CONFIG_MFD_AXP20X is not set
+# CONFIG_MFD_MADERA_I2C is not set
+# CONFIG_MFD_MADERA_SPI is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9062 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_HI6421_PMIC is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_INTEL_SOC_PMIC is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX77854 is not set
+# CONFIG_MFD_MAX77865 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_MENF21BMC is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RT5033 is not set
+# CONFIG_MFD_RTSX_USB is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_RK808 is not set
+# CONFIG_MFD_RN5T618 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_S2MPS17 is not set
+# CONFIG_MFD_S2MPU07 is not set
+CONFIG_MFD_S2MPU08=y
+# CONFIG_MFD_S2MPB02 is not set
+CONFIG_MFD_S2MU004=y
+# CONFIG_MFD_S2MU005 is not set
+# CONFIG_S2MU005_SUPPORT_BC1P2_CERTI is not set
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_ACT8865 is not set
+# CONFIG_REGULATOR_AD5398 is not set
+# CONFIG_REGULATOR_ANATOP is not set
+# CONFIG_REGULATOR_DA9210 is not set
+# CONFIG_REGULATOR_DA9211 is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+# CONFIG_REGULATOR_GPIO is not set
+# CONFIG_REGULATOR_ISL9305 is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+# CONFIG_REGULATOR_LTC3589 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_MT6311 is not set
+# CONFIG_REGULATOR_PFUZE100 is not set
+# CONFIG_REGULATOR_PWM is not set
+CONFIG_REGULATOR_S2MPU08=y
+# CONFIG_REGULATOR_S2DOS03 is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_RADIO_SUPPORT=y
+# CONFIG_MEDIA_SDR_SUPPORT is not set
+# CONFIG_MEDIA_RC_SUPPORT is not set
+CONFIG_MEDIA_M2M1SHOT=y
+# CONFIG_MEDIA_M2M1SHOT_TESTDEV is not set
+CONFIG_MEDIA_M2M1SHOT2=y
+# CONFIG_MEDIA_M2M1SHOT2_TESTDEV is not set
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_V4L2_MEM2MEM_DEV=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_ION=y
+# CONFIG_TTPCI_EEPROM is not set
+
+#
+# Media drivers
+#
+# CONFIG_MEDIA_USB_SUPPORT is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_EXYNOS=y
+CONFIG_EXYNOS_MEDIA_DEVICE=y
+CONFIG_VIDEO_EXYNOS_G2D1SHOT=y
+CONFIG_VIDEO_EXYNOS_SCALER=y
+# CONFIG_SCALER_NO_SOFTRST is not set
+CONFIG_VIDEO_EXYNOS_MFC=y
+CONFIG_EXYNOS_MFC_V11=y
+CONFIG_VIDEO_EXYNOS_SMFC=y
+CONFIG_VIDEO_EXYNOS_FIMC_IS2=y
+CONFIG_EXYNOS_FIMC_IS=y
+CONFIG_FIMC_IS_V6_20_0=y
+
+#
+# Sensor/CAMIF Setting
+#
+
+#
+# CSI Setting
+#
+CONFIG_EXYNOS_DEVICE_MIPI_CSIS_VER3=y
+# CONFIG_CSIS_V4_0 is not set
+# CONFIG_CSIS_V4_1 is not set
+CONFIG_CSIS_V5_0=y
+CONFIG_USE_CSI_DMAOUT_FEATURE=y
+
+#
+# BNS Setting
+#
+# CONFIG_EXYNOS_FIMC_BNS is not set
+CONFIG_CAMERA_CIS_SELECT=y
+# CONFIG_CAMERA_CIS_6B2_OBJ is not set
+# CONFIG_CAMERA_CIS_5E2_OBJ is not set
+# CONFIG_CAMERA_CIS_5E3_OBJ is not set
+# CONFIG_CAMERA_CIS_4H5YC_OBJ is not set
+# CONFIG_CAMERA_CIS_4H5_OBJ is not set
+# CONFIG_CAMERA_CIS_2P2_OBJ is not set
+CONFIG_CAMERA_CIS_2P6_OBJ=y
+# CONFIG_CAMERA_CIS_2P8_OBJ is not set
+# CONFIG_CAMERA_CIS_3P3_OBJ is not set
+# CONFIG_CAMERA_CIS_3L2_OBJ is not set
+# CONFIG_CAMERA_CIS_3H1_OBJ is not set
+# CONFIG_CAMERA_CIS_3H1_C3_OBJ is not set
+# CONFIG_CAMERA_CIS_4E6_OBJ is not set
+# CONFIG_CAMERA_CIS_3M2_OBJ is not set
+# CONFIG_CAMERA_CIS_3M3_OBJ is not set
+# CONFIG_CAMERA_CIS_2L1_OBJ is not set
+# CONFIG_CAMERA_CIS_3P8_OBJ is not set
+CONFIG_CAMERA_CIS_3P8SP_OBJ=y
+# CONFIG_CAMERA_CIS_2P7SX_OBJ is not set
+# CONFIG_CAMERA_CIS_2L2_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX260_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX333_OBJ is not set
+# CONFIG_CAMERA_CIS_2L7_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX320_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX320_C3_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX219_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX258_OBJ is not set
+# CONFIG_CAMERA_CIS_IMX241_OBJ is not set
+# CONFIG_CAMERA_CIS_SR259_OBJ is not set
+# CONFIG_CAMERA_CIS_SR556_OBJ is not set
+# CONFIG_CAMERA_CIS_SR556B_OBJ is not set
+CONFIG_CAMERA_CIS_SR846_OBJ=y
+# CONFIG_CAMERA_CIS_VIRTUAL_OBJ is not set
+CONFIG_CAMERA_ACT_SELECT=y
+# CONFIG_CAMERA_ACT_AK7348_OBJ is not set
+# CONFIG_CAMERA_ACT_AK7345_OBJ is not set
+# CONFIG_CAMERA_ACT_AK7371_OBJ is not set
+# CONFIG_CAMERA_ACT_DW9714_OBJ is not set
+# CONFIG_CAMERA_ACT_DW9804_OBJ is not set
+# CONFIG_CAMERA_ACT_DW9807_OBJ is not set
+# CONFIG_CAMERA_ACT_DW9808_OBJ is not set
+CONFIG_CAMERA_ACT_AK7372_OBJ=y
+# CONFIG_CAMERA_ACT_ZC533_OBJ is not set
+# CONFIG_CAMERA_ACT_ZC535_OBJ is not set
+CONFIG_CAMERA_FLASH_SELECT=y
+# CONFIG_CAMERA_FLASH_LM3560_OBJ is not set
+# CONFIG_CAMERA_FLASH_RT5033_OBJ is not set
+# CONFIG_CAMERA_FLASH_S2MPB02_OBJ is not set
+# CONFIG_CAMERA_FLASH_GPIO_OBJ is not set
+# CONFIG_CAMERA_FLASH_I2C_OBJ is not set
+CONFIG_CAMERA_FLASH_KTD2692_OBJ=y
+# CONFIG_CAMERA_OIS_SELECT is not set
+# CONFIG_CAMERA_FPGA_DPHY is not set
+
+#
+# Base Feature Setting
+#
+
+#
+# Direct FIMC-IS Control Setting
+#
+CONFIG_USE_DIRECT_IS_CONTROL=y
+# CONFIG_CAMERA_FIMC_SCALER_USE is not set
+# CONFIG_CAMERA_MC_SCALER_VER1_USE is not set
+CONFIG_CAMERA_MC_SCALER_VER2_USE=y
+# CONFIG_CAMERA_TDNR_VER1_USE is not set
+CONFIG_CAMERA_TDNR_VER2_USE=y
+# CONFIG_MC_SCALER_V1_22_V1_23 is not set
+# CONFIG_MC_SCALER_V2_0 is not set
+# CONFIG_MC_SCALER_V2_10 is not set
+# CONFIG_MC_SCALER_V3_0 is not set
+# CONFIG_MC_SCALER_V3_20 is not set
+CONFIG_MC_SCALER_V4_20=y
+CONFIG_USE_HW_API_COMMON=y
+CONFIG_USE_SENSOR_GROUP=y
+# CONFIG_DCP_V1_0 is not set
+# CONFIG_SRDZ_V1_0 is not set
+
+#
+# Vendor Feature Setting
+#
+# CONFIG_VENDER_DEFAULT is not set
+CONFIG_VENDER_MCD=y
+# CONFIG_VENDER_PSV is not set
+CONFIG_CAMERA_EEPROM_SUPPORT_REAR=y
+CONFIG_CAMERA_EEPROM_SUPPORT_FRONT=y
+# CONFIG_COMPANION_USE is not set
+# CONFIG_COMPANION_C1_USE is not set
+# CONFIG_COMPANION_C2_USE is not set
+# CONFIG_COMPANION_C3_USE is not set
+# CONFIG_COMPANION_DCDC_USE is not set
+# CONFIG_PREPROCESSOR_STANDBY_USE is not set
+# CONFIG_SENSOR_RETENTION_USE is not set
+# CONFIG_OIS_USE is not set
+# CONFIG_AF_HOST_CONTROL is not set
+# CONFIG_TORCH_CURRENT_CHANGE_SUPPORT is not set
+CONFIG_CAMERA_JACKPOT=y
+# CONFIG_CAMERA_J3TOPE is not set
+# CONFIG_CAMERA_J7TOPE is not set
+# CONFIG_CAMERA_J7DUO is not set
+# CONFIG_CAMERA_JACKPOT_JPN is not set
+# CONFIG_CAMERA_A6E is not set
+# CONFIG_CAMERA_OTPROM_SUPPORT_FRONT is not set
+# CONFIG_VIDEO_EXYNOS_CAMERA_POSTPROCESS is not set
+CONFIG_MEDIA_EXYNOS=y
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS is not set
+# CONFIG_VIDEO_SAMSUNG_S5P_TV is not set
+# CONFIG_VIDEO_XILINX is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+CONFIG_RADIO_ADAPTERS=y
+CONFIG_RADIO_S5E7885=y
+
+#
+# Samsung S610 FM driver (SPEEDY based)
+#
+CONFIG_RADIO_S610=y
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SHARK is not set
+# CONFIG_RADIO_SHARK2 is not set
+# CONFIG_USB_KEENE is not set
+# CONFIG_USB_RAREMONO is not set
+# CONFIG_USB_MA901 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+# CONFIG_CYPRESS_FIRMWARE is not set
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, frontends)
+#
+CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
+CONFIG_MEDIA_ATTACH=y
+
+#
+# Audio decoders, processors and mixers
+#
+
+#
+# RDS decoders
+#
+
+#
+# Video decoders
+#
+
+#
+# Video and audio decoders
+#
+
+#
+# Video encoders
+#
+
+#
+# Camera sensor devices
+#
+
+#
+# Flash devices
+#
+
+#
+# Video improvement chips
+#
+
+#
+# Audio/Video compression chips
+#
+
+#
+# Miscellaneous helper chips
+#
+
+#
+# Sensors used on soc_camera driver
+#
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA827X=y
+CONFIG_MEDIA_TUNER_TDA18271=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_XC4000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+
+#
+# Tools to develop new frontends
+#
+# CONFIG_DVB_DUMMY_FE is not set
+# CONFIG_TDMB is not set
+# CONFIG_ISDBT is not set
+# CONFIG_ISDBT_F_TYPE_ANTENNA is not set
+# CONFIG_ISDBT_GPIO_CLK is not set
+# CONFIG_SEC_ISDBT_FORCE_OFF is not set
+
+#
+# Graphics support
+#
+
+#
+# ARM GPU Configuration
+#
+CONFIG_DDK_VERSION_OS="o"
+CONFIG_MALI_TMIX=y
+# CONFIG_MALI_TMIX_R3P0 is not set
+# CONFIG_MALI_TMIX_R8P0 is not set
+CONFIG_MALI_TMIX_R9P0=y
+CONFIG_MALI_MIDGARD=y
+# CONFIG_MALI_GATOR_SUPPORT is not set
+# CONFIG_MALI_MIDGARD_DVFS is not set
+# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set
+# CONFIG_MALI_DEVFREQ is not set
+# CONFIG_MALI_DMA_FENCE is not set
+CONFIG_MALI_DEBUG_SYS=y
+CONFIG_MALI_DEBUG_KERNEL_SYSFS=y
+# CONFIG_MALI_EXPERT is not set
+CONFIG_MALI_PLATFORM_THIRDPARTY=y
+CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="exynos"
+CONFIG_EXYNOS_SOC_NAME="7885"
+CONFIG_MALI_SYSTRACE_SUPPORT=y
+CONFIG_MALI_DVFS=y
+CONFIG_MALI_PM_QOS=y
+# CONFIG_MALI_BTS_OPTIMIZATION is not set
+CONFIG_MALI_RT_PM=y
+CONFIG_MALI_EXYNOS_TRACE=y
+CONFIG_MALI_SEC_CL_BOOST=y
+CONFIG_MALI_SEC_UTILIZATION=y
+# CONFIG_MALI_EXYNOS_SECURE_RENDERING is not set
+CONFIG_MALI_SEC_JOB_STATUS_CHECK=y
+# CONFIG_DRM is not set
+
+#
+# Frame buffer Devices
+#
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_CMDLINE=y
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_ARMCLCD is not set
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_S3C is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+CONFIG_FB_SIMPLE=y
+CONFIG_EXYNOS_VIDEO=y
+CONFIG_EXYNOS_MIPI_DSI=y
+# CONFIG_EXYNOS_LCD_S6E8AX0 is not set
+CONFIG_EXYNOS_DECON_FB=y
+CONFIG_EXYNOS_DPP=y
+CONFIG_EXYNOS_MIPI_DSIM=y
+# CONFIG_EXYNOS_MIPI_DISPLAYPORT is not set
+CONFIG_EXYNOS_ZEBU_EMUL_DISP=y
+CONFIG_FB_WINDOW_UPDATE=y
+# CONFIG_DECON_BLOCKING_MODE is not set
+CONFIG_DECON_EVENT_LOG=y
+CONFIG_DECON_HIBER=y
+CONFIG_EXYNOS_DECON_LCD=y
+# CONFIG_EXYNOS_DECON_LCD_S6E3FA0 is not set
+CONFIG_EXYNOS_DECON_7885=y
+CONFIG_EXYNOS_SUPPORT_DOZE=y
+# CONFIG_EXYNOS_SUPPORT_FB_HANDOVER is not set
+CONFIG_LCD_HMT=y
+CONFIG_DISPLAY_USE_INFO=y
+CONFIG_EXYNOS_DECON_MDNIE_LITE=y
+# CONFIG_EXYNOS_DECON_LCD_S6E3FA3 is not set
+# CONFIG_EXYNOS_DECON_LCD_S6E3FA7 is not set
+CONFIG_EXYNOS_DECON_LCD_S6E3FA7_A5Y18=y
+# CONFIG_EXYNOS_DECON_LCD_S6E3FA7_A7Y18 is not set
+# CONFIG_EXYNOS_DECON_LCD_TD4100_J3TOPE is not set
+# CONFIG_EXYNOS_DECON_LCD_S6D7AT0B_J7TOPE is not set
+# CONFIG_EXYNOS_DECON_LCD_EA8061S_J7DUO is not set
+# CONFIG_EXYNOS_DECON_LCD_S6E8AA5_A6ELTE is not set
+# CONFIG_EXYNOS_DECON_LCD_S6E8AA5_FEEL2 is not set
+CONFIG_STATE_NOTIFIER=y
+# CONFIG_FB_SSD1307 is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_L4F00242T03 is not set
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI922X is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+# CONFIG_LCD_S6E63M0 is not set
+# CONFIG_LCD_LD9040 is not set
+# CONFIG_LCD_AMS369FG06 is not set
+# CONFIG_LCD_LMS501KF03 is not set
+# CONFIG_LCD_HX8357 is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+# CONFIG_BACKLIGHT_PWM is not set
+# CONFIG_BACKLIGHT_PM8941_WLED is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+# CONFIG_BACKLIGHT_LP855X is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+# CONFIG_ADF is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_COMPRESS_OFFLOAD=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+CONFIG_SND_PCM_TIMER=y
+# CONFIG_SND_HRTIMER is not set
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_MAX_CARDS=32
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_PROC_FS=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# HD-Audio
+#
+CONFIG_SND_HDA_PREALLOC_SIZE=64
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=y
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+# CONFIG_SND_USB_HIFACE is not set
+# CONFIG_SND_BCD2000 is not set
+# CONFIG_SND_USB_POD is not set
+# CONFIG_SND_USB_PODHD is not set
+# CONFIG_SND_USB_TONEPORT is not set
+# CONFIG_SND_USB_VARIAX is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_COMPRESS=y
+# CONFIG_SND_ATMEL_SOC is not set
+# CONFIG_SND_DESIGNWARE_I2S is not set
+
+#
+# SoC Audio for Freescale CPUs
+#
+
+#
+# Common SoC Audio options for Freescale CPUs:
+#
+# CONFIG_SND_SOC_FSL_ASRC is not set
+# CONFIG_SND_SOC_FSL_SAI is not set
+# CONFIG_SND_SOC_FSL_SSI is not set
+# CONFIG_SND_SOC_FSL_SPDIF is not set
+# CONFIG_SND_SOC_FSL_ESAI is not set
+# CONFIG_SND_SOC_IMX_AUDMUX is not set
+# CONFIG_SND_SOC_SAMSUNG is not set
+# CONFIG_SND_SOC_SAMSUNG_EXYNOS8895 is not set
+# CONFIG_SND_SOC_SAMSUNG_EXYNOS8895_MOON is not set
+# CONFIG_SND_SOC_SAMSUNG_EXYNOS8895_COD3033 is not set
+CONFIG_SND_SOC_SAMSUNG_EXYNOS7885=y
+CONFIG_SND_SOC_SAMSUNG_EXYNOS7885_COD3035=y
+CONFIG_SND_SOC_SAMSUNG_ABOX=y
+CONFIG_SEC_SND_SYNCHRONIZED_IPC=y
+# CONFIG_SND_SOC_BT_SHARED_SRATE is not set
+CONFIG_SND_SOC_FM=y
+CONFIG_SND_SOC_SAMSUNG_MAILBOX=y
+# CONFIG_SND_SOC_SAMSUNG_VTS is not set
+
+#
+# Allwinner SoC Audio support
+#
+# CONFIG_SND_SUN4I_CODEC is not set
+# CONFIG_SND_SOC_XTFPGA_I2S is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+
+#
+# CODEC drivers
+#
+# CONFIG_SND_SOC_AC97_CODEC is not set
+# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4554 is not set
+# CONFIG_SND_SOC_AK4613 is not set
+# CONFIG_SND_SOC_AK4642 is not set
+# CONFIG_SND_SOC_AK5386 is not set
+# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS42L51_I2C is not set
+# CONFIG_SND_SOC_CS42L52 is not set
+# CONFIG_SND_SOC_CS42L56 is not set
+# CONFIG_SND_SOC_CS42L73 is not set
+# CONFIG_SND_SOC_CS4265 is not set
+# CONFIG_SND_SOC_CS4270 is not set
+# CONFIG_SND_SOC_CS4271_I2C is not set
+# CONFIG_SND_SOC_CS4271_SPI is not set
+# CONFIG_SND_SOC_CS42XX8_I2C is not set
+# CONFIG_SND_SOC_CS4349 is not set
+CONFIG_SND_SOC_COD3035X=y
+# CONFIG_SND_SOC_ES8328 is not set
+# CONFIG_SND_SOC_GTM601 is not set
+# CONFIG_SND_SOC_MAX98506 is not set
+# CONFIG_SND_SOC_PCM1681 is not set
+# CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM512x_I2C is not set
+# CONFIG_SND_SOC_PCM512x_SPI is not set
+# CONFIG_SND_SOC_RT5631 is not set
+# CONFIG_SND_SOC_RT5677_SPI is not set
+# CONFIG_SND_SOC_SGTL5000 is not set
+# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
+# CONFIG_SND_SOC_SPDIF is not set
+# CONFIG_SND_SOC_SSM2602_SPI is not set
+# CONFIG_SND_SOC_SSM2602_I2C is not set
+# CONFIG_SND_SOC_SSM4567 is not set
+# CONFIG_SND_SOC_STA32X is not set
+# CONFIG_SND_SOC_STA350 is not set
+# CONFIG_SND_SOC_STI_SAS is not set
+# CONFIG_SND_SOC_TAS2552 is not set
+# CONFIG_SND_SOC_TAS5086 is not set
+# CONFIG_SND_SOC_TAS571X is not set
+CONFIG_SND_SOC_TFA9872=y
+# CONFIG_SND_SOC_TFA9879 is not set
+# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC31XX is not set
+# CONFIG_SND_SOC_TLV320AIC3X is not set
+# CONFIG_SND_SOC_TS3A227E is not set
+# CONFIG_SND_SOC_WM8510 is not set
+# CONFIG_SND_SOC_WM8523 is not set
+# CONFIG_SND_SOC_WM8580 is not set
+# CONFIG_SND_SOC_WM8711 is not set
+# CONFIG_SND_SOC_WM8728 is not set
+# CONFIG_SND_SOC_WM8731 is not set
+# CONFIG_SND_SOC_WM8737 is not set
+# CONFIG_SND_SOC_WM8741 is not set
+# CONFIG_SND_SOC_WM8750 is not set
+# CONFIG_SND_SOC_WM8753 is not set
+# CONFIG_SND_SOC_WM8770 is not set
+# CONFIG_SND_SOC_WM8776 is not set
+# CONFIG_SND_SOC_WM8804_I2C is not set
+# CONFIG_SND_SOC_WM8804_SPI is not set
+# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_TPA6130A2 is not set
+CONFIG_SND_SOC_DBMDX=y
+CONFIG_SND_SOC_DBMDX_SND_CAPTURE=y
+# CONFIG_SND_SIMPLE_CARD is not set
+# CONFIG_SOUND_PRIME is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_AUREAL is not set
+CONFIG_HID_BELKIN=y
+# CONFIG_HID_BETOP_FF is not set
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+# CONFIG_HID_CORSAIR is not set
+CONFIG_HID_PRODIKEYS=y
+# CONFIG_HID_CP2112 is not set
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_ELECOM=y
+# CONFIG_HID_ELO is not set
+CONFIG_HID_EZKEY=y
+# CONFIG_HID_GEMBIRD is not set
+# CONFIG_HID_GFRM is not set
+CONFIG_HID_HOLTEK=y
+# CONFIG_HOLTEK_FF is not set
+# CONFIG_HID_GT683R is not set
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+# CONFIG_HID_ICADE is not set
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+# CONFIG_HID_LENOVO is not set
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_LOGITECH_DJ=y
+CONFIG_HID_LOGITECH_HIDPP=y
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWHEELS_FF=y
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_PANTHERLORD_FF=y
+# CONFIG_HID_PENMOUNT is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+# CONFIG_HID_PICOLCD_FB is not set
+# CONFIG_HID_PICOLCD_BACKLIGHT is not set
+# CONFIG_HID_PICOLCD_LCD is not set
+# CONFIG_HID_PICOLCD_LEDS is not set
+# CONFIG_HID_PLANTRONICS is not set
+CONFIG_HID_PRIMAX=y
+CONFIG_HID_ROCCAT=y
+CONFIG_HID_SAITEK=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_SONY_FF=y
+CONFIG_HID_SPEEDLINK=y
+# CONFIG_HID_STEELSERIES is not set
+CONFIG_HID_SUNPLUS=y
+# CONFIG_HID_RMI is not set
+CONFIG_HID_GREENASIA=y
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_SYNAPTICS_BT=y
+CONFIG_HID_TIVO=y
+CONFIG_HID_TOPSEED=y
+# CONFIG_HID_THINGM is not set
+CONFIG_HID_THRUSTMASTER=y
+# CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_WACOM=y
+CONFIG_HID_WIIMOTE=y
+# CONFIG_HID_XINMO is not set
+CONFIG_HID_ZEROPLUS=y
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_HID_ZYDACRON=y
+# CONFIG_HID_SENSOR_HUB is not set
+CONFIG_HID_OVR=y
+CONFIG_HID_MADCATZ=y
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+CONFIG_USB_HIDDEV=y
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_ULPI_BUS is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_FOTG210_HCD is not set
+# CONFIG_USB_MAX3421_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_TEST_MODE is not set
+# CONFIG_USB_HOST_L1_SUPPORT is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_UAS is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USBIP_CORE is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Notify features
+#
+CONFIG_USB_HOST_NOTIFY=y
+CONFIG_USB_NOTIFY_LAYER=y
+CONFIG_USB_NOTIFIER=y
+CONFIG_USB_DEBUG_DETAILED_LOG=y
+CONFIG_USB_STORAGE_DETECT=y
+CONFIG_USB_HMT_SAMSUNG_INPUT=y
+CONFIG_USB_EXTERNAL_NOTIFY=y
+CONFIG_USB_NOTIFY_PROC_LOG=y
+CONFIG_USB_HOST_SAMSUNG_FEATURE=y
+CONFIG_USB_HW_PARAM=y
+
+#
+# USB TypeC Manager configs
+#
+CONFIG_USB_TYPEC_MANAGER_NOTIFIER=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_HOST is not set
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_DUAL_ROLE=y
+
+#
+# Platform Glue Driver Support
+#
+CONFIG_USB_DWC3_EXYNOS=y
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_ISP1760 is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_SIMPLE is not set
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MXUPORT is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=y
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SERIAL_WISHBONE is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_HSIC_USB3503 is not set
+# CONFIG_USB_LINK_LAYER_TEST is not set
+# CONFIG_USB_CHAOSKEY is not set
+
+#
+# USB Physical Layer drivers
+#
+# CONFIG_USB_PHY is not set
+# CONFIG_USB_OTG_WAKELOCK is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_DUAL_ROLE_USB_INTF=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_ULPI is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_USB_G_ANDROID=y
+CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE=y
+CONFIG_USB_DUN_SUPPORT=y
+# CONFIG_USB_RNDIS_MULTIPACKET_WITH_TIMER is not set
+# CONFIG_USB_RNDIS_VZW_REQ is not set
+CONFIG_USB_NCM_SUPPORT_MTU_CHANGE=y
+# CONFIG_USB_ANDROID_RNDIS_DWORD_ALIGNED is not set
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_GR_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_DUMMY_HCD is not set
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_F_ACM=y
+CONFIG_USB_U_SERIAL=y
+CONFIG_USB_U_ETHER=y
+CONFIG_USB_F_NCM=y
+CONFIG_USB_F_RNDIS=y
+CONFIG_USB_F_FS=y
+CONFIG_USB_F_MIDI=y
+CONFIG_USB_F_MTP=y
+CONFIG_USB_F_PTP=y
+CONFIG_USB_F_AUDIO_SRC=y
+CONFIG_USB_F_ACC=y
+CONFIG_USB_F_CONN_GADGET=y
+CONFIG_USB_CONFIGFS=y
+# CONFIG_USB_CONFIGFS_SERIAL is not set
+CONFIG_USB_CONFIGFS_ACM=y
+# CONFIG_USB_CONFIGFS_OBEX is not set
+CONFIG_USB_CONFIGFS_NCM=y
+# CONFIG_USB_CONFIGFS_ECM is not set
+# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set
+CONFIG_USB_CONFIGFS_RNDIS=y
+# CONFIG_USB_CONFIGFS_EEM is not set
+# CONFIG_USB_CONFIGFS_PHONET is not set
+# CONFIG_USB_CONFIGFS_MASS_STORAGE is not set
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_DM=y
+CONFIG_USB_CONFIGFS_F_ADB=y
+CONFIG_USB_CONFIGFS_F_MTP=y
+CONFIG_USB_CONFIGFS_F_PTP=y
+CONFIG_USB_CONFIGFS_F_CONN_GADGET=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_RNDIS_MULTIPACKET=y
+# CONFIG_USB_CONFIGFS_F_UAC1 is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+CONFIG_USB_CONFIGFS_F_MIDI=y
+# CONFIG_USB_CONFIGFS_F_HID is not set
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
+CONFIG_MMC_SUPPORT_STLOG=y
+# CONFIG_MMC_CMDQ_DEBUG is not set
+# CONFIG_MMC_EMBEDDED_SDIO is not set
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+# CONFIG_MMC_SANITIZE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+# CONFIG_MMC_SIMULATE_MAX_SPEED is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_ARMMMCI is not set
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_IDMAC=y
+CONFIG_MMC_DW_64BIT_DESC=y
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_MMC_DW_EXYNOS=y
+CONFIG_MMC_DW_DEBUG=y
+CONFIG_MMC_DW_EXYNOS_FMP=y
+CONFIG_MMC_DW_EXYNOS_SMU=y
+# CONFIG_MMC_DW_K3 is not set
+CONFIG_MMC_DW_FORCE_32BIT_SFR_RW=y
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MMC_USDHI6ROL0 is not set
+CONFIG_MMC_CQ_HCI=y
+# CONFIG_MMC_MTK is not set
+CONFIG_MMC_SRPMB=y
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_CLASS_FLASH is not set
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_BCM6328 is not set
+# CONFIG_LEDS_BCM6358 is not set
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_LP8860 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_TLC591XX is not set
+# CONFIG_LEDS_LM355x is not set
+
+#
+# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
+#
+# CONFIG_LEDS_BLINKM is not set
+# CONFIG_LEDS_SYSCON is not set
+# CONFIG_LEDS_S2MPB02 is not set
+CONFIG_LEDS_KTD2692=y
+CONFIG_LEDS_S2MU004_RGB=y
+# CONFIG_LEDS_S2MU005_FLASH is not set
+# CONFIG_S2MU005_LEDS_I2C is not set
+# CONFIG_LEDS_SUPPORT_FRONT_FLASH is not set
+# CONFIG_LEDS_SUPPORT_FRONT_FLASH_AUTO is not set
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+CONFIG_SWITCH=y
+# CONFIG_SWITCH_GPIO is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_EDAC_SUPPORT=y
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABX80X is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_HYM8563 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_ISL12057 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF2127 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF85063 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+# CONFIG_RTC_DRV_RV8803 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1343 is not set
+# CONFIG_RTC_DRV_DS1347 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_MCP795 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_ZYNQMP is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_HAVE_S3C_RTC=y
+# CONFIG_RTC_DRV_S3C is not set
+CONFIG_RTC_DRV_S2MPU08=y
+# CONFIG_RTC_DRV_PL030 is not set
+# CONFIG_RTC_DRV_PL031 is not set
+# CONFIG_RTC_DRV_SNVS is not set
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+# CONFIG_AMBA_PL08X is not set
+# CONFIG_FSL_EDMA is not set
+# CONFIG_INTEL_IDMA64 is not set
+CONFIG_PL330_DMA=y
+# CONFIG_DW_DMAC is not set
+
+#
+# DMA Clients
+#
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_VFIO is not set
+# CONFIG_VIRT_DRIVERS is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_PRISM2_USB is not set
+# CONFIG_COMEDI is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_R8712U is not set
+# CONFIG_R8188EU is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16204 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADIS16220 is not set
+# CONFIG_ADIS16240 is not set
+# CONFIG_LIS3L02DQ is not set
+# CONFIG_SCA3000 is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7606 is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_AD7280 is not set
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7152 is not set
+# CONFIG_AD7746 is not set
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16060 is not set
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+
+#
+# Light sensors
+#
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2x7x is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_SENSORS_HMC5843_I2C is not set
+# CONFIG_SENSORS_HMC5843_SPI is not set
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7753 is not set
+# CONFIG_ADE7754 is not set
+# CONFIG_ADE7758 is not set
+# CONFIG_ADE7759 is not set
+# CONFIG_ADE7854 is not set
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S90 is not set
+# CONFIG_AD2S1200 is not set
+# CONFIG_AD2S1210 is not set
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+# CONFIG_STAGING_MEDIA is not set
+
+#
+# Android
+#
+CONFIG_ASHMEM=y
+CONFIG_ANDROID_TIMED_OUTPUT=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER_AUTODETECT_OOM_ADJ_VALUES=y
+CONFIG_ANDROID_INTF_ALARM_DEV=y
+CONFIG_SYNC=y
+CONFIG_SW_SYNC=y
+CONFIG_SW_SYNC_USER=y
+CONFIG_ION=y
+CONFIG_ION_TEST=y
+# CONFIG_ION_DUMMY is not set
+CONFIG_ION_EXYNOS=y
+CONFIG_ION_EXYNOS_STAT_LOG=y
+# CONFIG_ION_EXYNOS_OF is not set
+# CONFIG_FIQ_DEBUGGER is not set
+# CONFIG_FIQ_WATCHDOG is not set
+# CONFIG_STAGING_BOARD is not set
+# CONFIG_WIMAX_GDM72XX is not set
+# CONFIG_LTE_GDM724X is not set
+# CONFIG_LUSTRE_FS is not set
+# CONFIG_DGAP is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+# CONFIG_FB_TFT is not set
+# CONFIG_FSL_MC_BUS is not set
+# CONFIG_WILC1000_DRIVER is not set
+# CONFIG_MOST is not set
+
+#
+# Samsung TN Features
+#
+CONFIG_SEC_EXT=y
+CONFIG_SEC_SYSFS=y
+CONFIG_SEC_REBOOT=y
+CONFIG_SEC_DEBUG=y
+CONFIG_SEC_DEBUG_RESET_REASON=y
+CONFIG_SEC_DEBUG_EXTRA_INFO=y
+CONFIG_SEC_DEBUG_HW_PARAM=y
+CONFIG_SEC_DEBUG_AUTO_SUMMARY=y
+CONFIG_SEC_UPLOAD=y
+CONFIG_SEC_FD_DETECT=y
+CONFIG_SEC_DEBUG_LAST_KMSG=y
+
+#
+# Samsung TN BSP Options
+#
+CONFIG_SEC_PARAM=y
+CONFIG_CM_OFFSET=7340596
+CONFIG_SEC_EVENT_LOG=y
+CONFIG_SEC_BOOTSTAT=y
+CONFIG_ARGOS=y
+# CONFIG_SEC_KWATCHER is not set
+# CONFIG_SEC_MMIOTRACE is not set
+
+#
+# Samsung TN Build Options
+#
+# CONFIG_SEC_FACTORY is not set
+CONFIG_SAMSUNG_PRODUCT_SHIP=y
+
+#
+# Samsung TN Logging Options
+#
+CONFIG_SEC_AVC_LOG=y
+CONFIG_SEC_DEBUG_TSP_LOG=y
+
+#
+# Samsung TN Power Management Options
+#
+CONFIG_SEC_PM=y
+CONFIG_SEC_PM_DEBUG=y
+
+#
+# Samsung TN NAD Options
+#
+CONFIG_SEC_NAD=y
+CONFIG_SEC_NAD_MANUAL_PARAM_READTIME=10
+CONFIG_SEC_SUPPORT_SECOND_NAD=y
+# CONFIG_SEC_NAD_HPM is not set
+CONFIG_SEC_NAD_API=y
+CONFIG_SEC_NAD_BALANCER=y
+CONFIG_SEC_DUMP_SUMMARY=y
+CONFIG_SEC_DEBUG_GAF_V3=y
+# CONFIG_SEC_DEBUG_GAF_V4 is not set
+CONFIG_VNSWAP=y
+CONFIG_SEC_STI=y
+
+#
+# Samsung ABC Options
+#
+CONFIG_SEC_ABC=y
+
+#
+# Samsung ABC Hub Options
+#
+# CONFIG_SEC_ABC_HUB is not set
+
+#
+# Samsung ABC Hub Connect Detect Options
+#
+
+#
+# Samsung ABC Hub Booting Time Check Options
+#
+
+#
+# Samsung ABC Hub Booting Time Check eng mode Options
+#
+# CONFIG_GOLDFISH is not set
+# CONFIG_CHROME_PLATFORMS is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+# CONFIG_COMMON_CLK_VERSATILE is not set
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI514 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
+# CONFIG_CLK_QORIQ is not set
+CONFIG_COMMON_CLK_XGENE=y
+# CONFIG_COMMON_CLK_PWM is not set
+# CONFIG_COMMON_CLK_PXA is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+CONFIG_COMMON_CLK_SAMSUNG=y
+CONFIG_COMPOSITE_CLK_SAMSUNG=y
+
+#
+# Hardware Spinlock drivers
+#
+
+#
+# Clock Source drivers
+#
+CONFIG_CLKSRC_OF=y
+CONFIG_CLKSRC_PROBE=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set
+# CONFIG_ARM_TIMER_SP804 is not set
+# CONFIG_ATMEL_PIT is not set
+CONFIG_CLKSRC_EXYNOS_MCT=y
+# CONFIG_SH_TIMER_CMT is not set
+# CONFIG_SH_TIMER_MTU2 is not set
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_EM_TIMER_STI is not set
+# CONFIG_MAILBOX is not set
+CONFIG_IOMMU_API=y
+CONFIG_IOMMU_SUPPORT=y
+
+#
+# Generic IOMMU Pagetable Support
+#
+# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
+CONFIG_IOMMU_IOVA=y
+CONFIG_OF_IOMMU=y
+CONFIG_IOMMU_DMA=y
+CONFIG_EXYNOS_IOMMU=y
+CONFIG_EXYNOS_IOVMM=y
+# CONFIG_EXYNOS_IOMMU_DEBUG is not set
+# CONFIG_ARM_SMMU is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SUNXI_SRAM is not set
+# CONFIG_SOC_TI is not set
+CONFIG_SOC_SAMSUNG=y
+CONFIG_EXYNOS_CHIPID=y
+CONFIG_EXYNOS_PMU=y
+CONFIG_EXYNOS_REBOOT=y
+# CONFIG_PWRCAL is not set
+CONFIG_ECT=y
+CONFIG_ECT_DUMP=y
+CONFIG_EXYNOS_PD=y
+# CONFIG_EXYNOS_BCM is not set
+CONFIG_EXYNOS_RGT=y
+# CONFIG_EXYNOS_WD_DVFS is not set
+CONFIG_SAMSUNG_DMADEV=y
+# CONFIG_EXYNOS_HOTPLUG_GOVERNOR is not set
+CONFIG_CAL_IF=y
+CONFIG_PMUCAL=y
+CONFIG_CMUCAL=y
+CONFIG_CP_PMUCAL=y
+# CONFIG_GNSS_PMUCAL is not set
+CONFIG_CMUCAL_DEBUG=y
+CONFIG_CMUCAL_QCH_IGNORE_SUPPORT=y
+CONFIG_ACPM_DVFS=y
+CONFIG_USI=y
+CONFIG_EXYNOS_SECURE_LOG=y
+# CONFIG_EXYNOS_KERNEL_PROTECTION is not set
+CONFIG_EXYNOS_SDM=y
+CONFIG_EXYNOS_CONTENT_PATH_PROTECTION=y
+CONFIG_EXYNOS_ACPM=y
+CONFIG_EXYNOS7885_ACPM=y
+CONFIG_EXYNOS_HDCP2=y
+# CONFIG_HDCP2_EMULATION_MODE is not set
+# CONFIG_EXYNOS_MCINFO is not set
+CONFIG_EXYNOS_DVFS_MANAGER=y
+# CONFIG_SEC_INCELL is not set
+CONFIG_PM_DEVFREQ=y
+
+#
+# DEVFREQ Governors
+#
+# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set
+# CONFIG_DEVFREQ_GOV_SIMPLE_USAGE is not set
+# CONFIG_DEVFREQ_GOV_SIMPLE_EXYNOS is not set
+CONFIG_DEVFREQ_GOV_SIMPLE_INTERACTIVE=y
+# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
+# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
+# CONFIG_DEVFREQ_GOV_USERSPACE is not set
+
+#
+# DEVFREQ Drivers
+#
+CONFIG_ARM_EXYNOS_DEVFREQ=y
+CONFIG_ARM_EXYNOS_DEVFREQ_DEBUG=y
+# CONFIG_PM_DEVFREQ_EVENT is not set
+CONFIG_ARM_EXYNOS7885_BUS_DEVFREQ=y
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+# CONFIG_IIO_BUFFER_CB is not set
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+
+#
+# Accelerometers
+#
+# CONFIG_BMA180 is not set
+# CONFIG_BMC150_ACCEL is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+# CONFIG_KXSD9 is not set
+# CONFIG_KXCJK1013 is not set
+# CONFIG_MMA8452 is not set
+# CONFIG_MMA9551 is not set
+# CONFIG_MMA9553 is not set
+# CONFIG_MXC4005 is not set
+# CONFIG_STK8312 is not set
+# CONFIG_STK8BA50 is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7266 is not set
+# CONFIG_AD7291 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_AD7923 is not set
+# CONFIG_AD799X is not set
+# CONFIG_CC10001_ADC is not set
+CONFIG_EXYNOS_ADC=y
+# CONFIG_HI8435 is not set
+# CONFIG_MAX1027 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_MCP320X is not set
+# CONFIG_MCP3422 is not set
+# CONFIG_NAU7802 is not set
+# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC128S052 is not set
+# CONFIG_VF610_ADC is not set
+
+#
+# Amplifiers
+#
+# CONFIG_AD8366 is not set
+
+#
+# Chemical Sensors
+#
+# CONFIG_VZ89X is not set
+
+#
+# Hid Sensor IIO Common
+#
+
+#
+# SSP Sensor Common
+#
+# CONFIG_IIO_SSP_SENSORHUB is not set
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_AD5686 is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD7303 is not set
+# CONFIG_M62332 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MAX5821 is not set
+# CONFIG_MCP4725 is not set
+# CONFIG_MCP4922 is not set
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+# CONFIG_AD9523 is not set
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+# CONFIG_ADF4350 is not set
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADIS16260 is not set
+# CONFIG_ADXRS450 is not set
+# CONFIG_BMG160 is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_ITG3200 is not set
+
+#
+# Humidity sensors
+#
+# CONFIG_DHT11 is not set
+# CONFIG_HDC100X is not set
+# CONFIG_HTU21 is not set
+# CONFIG_SI7005 is not set
+# CONFIG_SI7020 is not set
+
+#
+# Inertial measurement units
+#
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16480 is not set
+# CONFIG_KMX61 is not set
+# CONFIG_INV_MPU6050_IIO is not set
+
+#
+# Light sensors
+#
+# CONFIG_ADJD_S311 is not set
+# CONFIG_AL3320A is not set
+# CONFIG_APDS9300 is not set
+# CONFIG_APDS9960 is not set
+# CONFIG_BH1750 is not set
+# CONFIG_CM32181 is not set
+# CONFIG_CM3232 is not set
+# CONFIG_CM3323 is not set
+# CONFIG_CM36651 is not set
+# CONFIG_GP2AP020A00F is not set
+# CONFIG_ISL29125 is not set
+# CONFIG_JSA1212 is not set
+# CONFIG_RPR0521 is not set
+# CONFIG_LTR501 is not set
+# CONFIG_OPT3001 is not set
+# CONFIG_PA12203001 is not set
+# CONFIG_STK3310 is not set
+# CONFIG_TCS3414 is not set
+# CONFIG_TCS3472 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_TSL4531 is not set
+# CONFIG_US5182D is not set
+# CONFIG_VCNL4000 is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_AK8975 is not set
+# CONFIG_AK09911 is not set
+# CONFIG_BMC150_MAGN is not set
+# CONFIG_MAG3110 is not set
+# CONFIG_MMC35240 is not set
+# CONFIG_IIO_ST_MAGN_3AXIS is not set
+
+#
+# Inclinometer sensors
+#
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_INTERRUPT_TRIGGER is not set
+# CONFIG_IIO_SYSFS_TRIGGER is not set
+
+#
+# Digital potentiometers
+#
+# CONFIG_MCP4531 is not set
+
+#
+# Pressure sensors
+#
+# CONFIG_BMP280 is not set
+# CONFIG_MPL115 is not set
+# CONFIG_MPL3115 is not set
+# CONFIG_MS5611 is not set
+# CONFIG_MS5637 is not set
+# CONFIG_IIO_ST_PRESS is not set
+# CONFIG_T5403 is not set
+
+#
+# Lightning sensors
+#
+# CONFIG_AS3935 is not set
+
+#
+# Proximity sensors
+#
+# CONFIG_LIDAR_LITE_V2 is not set
+# CONFIG_SX9500 is not set
+
+#
+# Temperature sensors
+#
+# CONFIG_MLX90614 is not set
+# CONFIG_TMP006 is not set
+# CONFIG_TSYS01 is not set
+# CONFIG_TSYS02D is not set
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+# CONFIG_PWM_FSL_FTM is not set
+# CONFIG_PWM_PCA9685 is not set
+CONFIG_PWM_SAMSUNG=y
+CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_V3=y
+# CONFIG_IPACK_BUS is not set
+CONFIG_BATTERY_SAMSUNG=y
+CONFIG_BATTERY_SWELLING=y
+# CONFIG_BATTERY_SWELLING_SELF_DISCHARGING is not set
+# CONFIG_CALC_TIME_TO_FULL is not set
+# CONFIG_SW_SELF_DISCHARGING is not set
+CONFIG_BATTERY_AGE_FORECAST=y
+# CONFIG_MULTI_CHARGING is not set
+# CONFIG_STEP_CHARGING is not set
+# CONFIG_UPDATE_BATTERY_DATA is not set
+# CONFIG_SAMSUNG_BATTERY_ENG_TEST is not set
+# CONFIG_FUELGAUGE_DUMMY is not set
+# CONFIG_FUELGAUGE_MAX17042 is not set
+# CONFIG_FUELGAUGE_MAX17048 is not set
+# CONFIG_FUELGAUGE_MAX17050 is not set
+# CONFIG_FUELGAUGE_MAX77823 is not set
+# CONFIG_FUELGAUGE_MAX77843 is not set
+# CONFIG_FUELGAUGE_MAX77833 is not set
+# CONFIG_FUELGAUGE_MAX77854 is not set
+# CONFIG_CHARGER_DUMMY is not set
+# CONFIG_CHARGER_SMB328 is not set
+# CONFIG_CHARGER_BQ24157 is not set
+# CONFIG_CHARGER_BQ24191 is not set
+# CONFIG_CHARGER_BQ24260 is not set
+# CONFIG_CHARGER_MAX77823 is not set
+# CONFIG_CHARGER_MAX77843 is not set
+# CONFIG_CHARGER_MAX77833 is not set
+# CONFIG_CHARGER_MAX77854 is not set
+# CONFIG_CHARGER_DA9155 is not set
+# CONFIG_WIRELESS_CHARGER_HIGH_VOLTAGE is not set
+# CONFIG_CS100_JPNCONCEPT is not set
+# CONFIG_WIRELESS_CHARGER_BQ51221 is not set
+# CONFIG_WIRELESS_CHARGER_P9220 is not set
+# CONFIG_WIRELESS_FIRMWARE_UPDATE is not set
+CONFIG_AFC_CHARGER_MODE=y
+# CONFIG_SAMSUNG_LPM_MODE is not set
+# CONFIG_EN_OOPS is not set
+# CONFIG_STORE_MODE is not set
+CONFIG_BATTERY_NOTIFIER=y
+CONFIG_BATTERY_SAMSUNG_V2=y
+# CONFIG_CHARGING_VZWCONCEPT is not set
+# CONFIG_BATTERY_AGE_FORECAST_DETACHABLE is not set
+# CONFIG_ENG_BATTERY_CONCEPT is not set
+# CONFIG_AFC_CURR_CONTROL_BY_TEMP is not set
+CONFIG_BATTERY_CISD=y
+# CONFIG_FUELGAUGE_MAX77865 is not set
+CONFIG_FUELGAUGE_S2MU004=y
+# CONFIG_FUELGAUGE_S2MU005 is not set
+# CONFIG_CHARGER_MAX77865 is not set
+CONFIG_CHARGER_S2MU004=y
+# CONFIG_CHARGER_S2MU004_IVR_IRQ is not set
+# CONFIG_WIRELESS_CHARGER_S2MIW03 is not set
+# CONFIG_WIRELESS_CHARGER_MFC is not set
+# CONFIG_QH_ALGORITHM is not set
+# CONFIG_ENABLE_100MA_CHARGING_BEFORE_USB_CONFIGURED is not set
+# CONFIG_RESET_CONTROLLER is not set
+# CONFIG_FMC is not set
+
+#
+# PHY Subsystem
+#
+CONFIG_GENERIC_PHY=y
+# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
+CONFIG_PHY_EXYNOS_MIPI=y
+# CONFIG_PHY_EXYNOS8895_MIPI is not set
+# CONFIG_PHY_EXYNOS_DISPLAYPORT is not set
+# CONFIG_PHY_PXA_28NM_HSIC is not set
+# CONFIG_PHY_PXA_28NM_USB2 is not set
+# CONFIG_PHY_EXYNOS_DP_VIDEO is not set
+# CONFIG_BCM_KONA_USB2_PHY is not set
+CONFIG_PHY_EXYNOS5_USBDRD=y
+# CONFIG_PHY_EXYNOS_USBDRD is not set
+CONFIG_PHY_EXYNOS_USBDRD3=y
+CONFIG_PHY_EXYNOS_DEBUGFS=y
+CONFIG_PHY_SAMSUNG_USB_CAL=y
+# CONFIG_PHY_XGENE is not set
+# CONFIG_POWERCAP is not set
+# CONFIG_MCB is not set
+
+#
+# Performance monitor support
+#
+CONFIG_ARM_PMU=y
+# CONFIG_RAS is not set
+
+#
+# Android
+#
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder"
+# CONFIG_LIBNVDIMM is not set
+# CONFIG_NVMEM is not set
+# CONFIG_STM is not set
+# CONFIG_STM_DUMMY is not set
+# CONFIG_STM_SOURCE_CONSOLE is not set
+# CONFIG_INTEL_TH is not set
+
+#
+# FPGA Configuration Support
+#
+# CONFIG_FPGA is not set
+CONFIG_EXYNOS_BTS=y
+CONFIG_EXYNOS7885_BTS=y
+CONFIG_TRACE=y
+CONFIG_EXYNOS_ITMON=y
+CONFIG_EXYNOS_SNAPSHOT=y
+CONFIG_EXYNOS_SNAPSHOT_CALLSTACK=4
+CONFIG_EXYNOS_SNAPSHOT_IRQ_EXIT=y
+CONFIG_EXYNOS_SNAPSHOT_IRQ_EXIT_THRESHOLD=0
+# CONFIG_EXYNOS_SNAPSHOT_IRQ_DISABLED is not set
+CONFIG_EXYNOS_SNAPSHOT_CLK=y
+CONFIG_EXYNOS_SNAPSHOT_PMU=y
+CONFIG_EXYNOS_SNAPSHOT_FREQ=y
+CONFIG_EXYNOS_SNAPSHOT_DM=y
+CONFIG_EXYNOS_SNAPSHOT_HRTIMER=y
+# CONFIG_EXYNOS_SNAPSHOT_REG is not set
+CONFIG_EXYNOS_SNAPSHOT_REGULATOR=y
+CONFIG_EXYNOS_SNAPSHOT_ACPM=y
+CONFIG_EXYNOS_SNAPSHOT_THERMAL=y
+# CONFIG_EXYNOS_SNAPSHOT_I2C is not set
+# CONFIG_EXYNOS_SNAPSHOT_SPI is not set
+CONFIG_EXYNOS_SNAPSHOT_PSTORE=y
+CONFIG_EXYNOS_SNAPSHOT_HOOK_LOGGER=y
+CONFIG_EXYNOS_SNAPSHOT_PANIC_REBOOT=y
+CONFIG_EXYNOS_SNAPSHOT_WATCHDOG_RESET=y
+CONFIG_EXYNOS_SNAPSHOT_CRASH_KEY=y
+CONFIG_EXYNOS_SNAPSHOT_SFRDUMP=y
+# CONFIG_EXYNOS_SNAPSHOT_MINIMIZED_MODE is not set
+# CONFIG_EXYNOS_CORESIGHT is not set
+# CONFIG_EXYNOS_CORESIGHT_ETM is not set
+# CONFIG_EXYNOS_CORESIGHT_STM is not set
+# CONFIG_EXYNOS_CONSOLE_DEBUGGER is not set
+CONFIG_TRUSTONIC_TEE=y
+CONFIG_TRUSTONIC_TEE_LPAE=y
+# CONFIG_TRUSTONIC_TEE_DEBUG is not set
+CONFIG_TRUSTONIC_TRUSTED_UI=y
+CONFIG_TRUSTONIC_TRUSTED_UI_FB_BLANK=y
+CONFIG_SECURE_OS_CONTROL=y
+CONFIG_SECURE_OS_BOOSTER_API=y
+CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
+# CONFIG_SECURE_OS_SUPPORT_MCT_DISABLE is not set
+# CONFIG_VISION_SUPPORT is not set
+
+#
+# USB PD configs
+#
+CONFIG_USE_CCIC=y
+CONFIG_CCIC_S2MU004=y
+CONFIG_CCIC_VDM=y
+# CONFIG_CCIC_S2MM005 is not set
+CONFIG_CCIC_NOTIFIER=y
+# CONFIG_CCIC_ALTERNATE_MODE is not set
+CONFIG_SENSORS_FINGERPRINT=y
+# CONFIG_SENSORS_VFS7XXX is not set
+# CONFIG_SENSORS_FPRINT_SECURE is not set
+# CONFIG_SENSORS_FINGERPRINT_32BITS_PLATFORM_ONLY is not set
+# CONFIG_SENSORS_ET320 is not set
+# CONFIG_SENSORS_ET510 is not set
+CONFIG_SENSORS_ET5XX=y
+# CONFIG_SENSORS_GW32X is not set
+# CONFIG_SENSORS_FINGERPRINT_DUALIZATION is not set
+# CONFIG_SENSORS_FP_LOCKSCREEN_MODE is not set
+CONFIG_SENSORS_SSP=y
+CONFIG_SENSORS_SSP_STM32=y
+# CONFIG_SSP_ENG_DEBUG is not set
+# CONFIG_SENSORS_A96T3X6 is not set
+CONFIG_SENSORS_SSP_ATUC128L5HAR=y
+CONFIG_SENSORS_SSP_ACCELOMETER=y
+CONFIG_SENSORS_SSP_GYROSCOPE=y
+CONFIG_SENSORS_SSP_MAGNETIC=y
+CONFIG_SENSORS_SSP_PROXIMITY=y
+CONFIG_SENSORS_SSP_LIGHT=y
+CONFIG_SENSORS_SSP_BAROMETER=y
+CONFIG_SENSORS_SSP_MOBEAM=y
+CONFIG_SENSORS_SSP_ACCELOMETER_LSM6DSL=y
+# CONFIG_SENSORS_SSP_ACCELOMETER_K6DS3TR is not set
+# CONFIG_SENSORS_SSP_ACCELOMETER_MPU6500 is not set
+# CONFIG_SENSORS_SSP_ACCELOMETER_BMI168 is not set
+CONFIG_SENSORS_SSP_GYROSCOPE_LSM6DSL=y
+# CONFIG_SENSORS_SSP_GYROSCOPE_K6DS3TR is not set
+# CONFIG_SENSORS_SSP_GYROSCOPE_MPU6500 is not set
+# CONFIG_SENSORS_SSP_GYROSCOPE_BMI168 is not set
+CONFIG_SENSORS_SSP_MAGNETIC_AK09918C=y
+# CONFIG_SENSORS_SSP_MAGNETIC_AK09916C is not set
+# CONFIG_SENSORS_SSP_MAGNETIC_AK09911 is not set
+# CONFIG_SENSORS_SSP_MAGNETIC_LSM303AH is not set
+# CONFIG_SENSORS_SSP_MAGNETIC_YAS539 is not set
+CONFIG_SENSORS_SSP_PROXIMITY_AUTO_CAL_TMD3725=y
+# CONFIG_SENSORS_SSP_PROXIMITY_TMG399X is not set
+# CONFIG_SENSORS_SSP_PROXIMITY_TMD3700 is not set
+# CONFIG_SENSORS_SSP_PROXIMITY_TMD3725 is not set
+# CONFIG_SENSORS_SSP_LIGHT_TMG399X is not set
+CONFIG_SENSORS_SSP_LIGHT_TMD3725=y
+# CONFIG_SENSORS_SSP_LIGHT_TMD3700 is not set
+CONFIG_SENSORS_SSP_BAROMETER_LPS22H=y
+# CONFIG_SENSORS_SSP_BAROMETER_LPS25H is not set
+# CONFIG_SENSORS_SSP_BAROMETER_BMP280 is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SENSORS_CORE is not set
+# CONFIG_SENSORS_LSM6DSL is not set
+# CONFIG_SENSORS_LSM6DSL_I2C is not set
+# CONFIG_SENSORS_LSM6DSL_SPI is not set
+# CONFIG_SENSORS_LIS2DS is not set
+# CONFIG_SENSORS_LIS2DS_I2C is not set
+# CONFIG_SENSORS_LIS2DS_SPI is not set
+# CONFIG_SENSORS_K2HH is not set
+# CONFIG_SENSORS_YAS539 is not set
+# CONFIG_SENSORS_GP2AP070S is not set
+# CONFIG_SENSORS_STK3013 is not set
+# CONFIG_SENSORS_CM36686 is not set
+# CONFIG_SENSORS_CM36672P is not set
+# CONFIG_SENSORS_TMD3725 is not set
+CONFIG_MOTOR_ZH915=y
+# CONFIG_SEC_VIB is not set
+CONFIG_MOTOR_S2MU004=y
+CONFIG_FIVE_USE_TRUSTONIC=y
+CONFIG_FIVE_TRUSTLET_PATH="five/ffffffff000000000000000000000072.tlbin"
+
+#
+# Firmware Drivers
+#
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_FIRMWARE_MEMMAP is not set
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_INTERRUPTIBLE_SYNC=y
+CONFIG_DYNAMIC_FSYNC=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_EXT4_FS_ENCRYPTION=y
+CONFIG_EXT4_PRIVATE_ENCRYPTION=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_FS_DAX is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QUOTA_DEBUG is not set
+CONFIG_QUOTA_TREE=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+# CONFIG_OVERLAY_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_VIRTUAL_XATTR=y
+CONFIG_FAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:sdcard_external:s0"
+CONFIG_FAT_SUPPORT_STLOG=y
+CONFIG_SDFAT_FS=y
+CONFIG_SDFAT_DELAYED_META_DIRTY=y
+# CONFIG_SDFAT_SUPPORT_DIR_SYNC is not set
+CONFIG_SDFAT_DEFAULT_CODEPAGE=437
+CONFIG_SDFAT_DEFAULT_IOCHARSET="utf8"
+# CONFIG_SDFAT_CHECK_RO_ATTR is not set
+CONFIG_SDFAT_ALIGNED_MPAGE_WRITE=y
+CONFIG_SDFAT_VIRTUAL_XATTR=y
+CONFIG_SDFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:sdcard_external:s0"
+CONFIG_SDFAT_SUPPORT_STLOG=y
+CONFIG_SDFAT_DEBUG=y
+# CONFIG_SDFAT_DBG_IOCTL is not set
+CONFIG_SDFAT_DBG_MSG=y
+# CONFIG_SDFAT_DBG_BUGON is not set
+CONFIG_SDFAT_STATISTICS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+CONFIG_NTFS_FS=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+# CONFIG_PROC_CHILDREN is not set
+CONFIG_PROC_STLOG=y
+CONFIG_KERNFS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+CONFIG_ECRYPT_FS=y
+# CONFIG_ECRYPT_FS_MESSAGING is not set
+CONFIG_SDP=y
+# CONFIG_SDP_KEY_DUMP is not set
+CONFIG_DLP=y
+CONFIG_WTL_ENCRYPTION_FILTER=y
+CONFIG_ECRYPTFS_FEK_INTEGRITY=y
+CONFIG_SDCARD_FS=y
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_PSTORE=y
+# CONFIG_PSTORE_CONSOLE is not set
+CONFIG_PSTORE_PMSG=y
+CONFIG_PSTORE_RAM=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+# CONFIG_VIRTUALIZATION is not set
+
+#
+# Kernel hacking
+#
+
+#
+# printk and dmesg options
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_PRINTK_PROCESS=y
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+
+#
+# Compile-time checks and compiler options
+#
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_INFO_SPLIT is not set
+# CONFIG_DEBUG_INFO_DWARF4 is not set
+# CONFIG_GDB_SCRIPTS is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_PAGE_OWNER is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
+CONFIG_DEBUG_KERNEL=y
+
+#
+# Memory Debugging
+#
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_HAVE_ARCH_KASAN=y
+# CONFIG_KASAN is not set
+# CONFIG_DEBUG_SHIRQ is not set
+
+#
+# Debug Lockups and Hangs
+#
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU=y
+CONFIG_HARDLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y
+CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHED_INFO=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_SCHED_STACK_END_CHECK is not set
+# CONFIG_DEBUG_TIMEKEEPING is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_PI_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_TORTURE_TEST is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RCU_EQS_DEBUG is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACE_CLOCK=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_GPU_TRACEPOINTS=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+# CONFIG_FTRACE_SYSCALLS is not set
+# CONFIG_TRACER_SNAPSHOT is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_PROBE_EVENTS is not set
+# CONFIG_TRACEPOINT_BENCHMARK is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_RING_BUFFER_STARTUP_TEST is not set
+# CONFIG_TRACE_ENUM_MAP_FILE is not set
+CONFIG_TRACING_EVENTS_GPIO=y
+
+#
+# Runtime Testing
+#
+# CONFIG_LKDTM is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_PERCPU_TEST is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_TEST_LKM is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_TEST_FIRMWARE is not set
+# CONFIG_TEST_UDELAY is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_TEST_STATIC_KEYS is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM64_PTDUMP is not set
+CONFIG_STRICT_DEVMEM=y
+# CONFIG_PID_IN_CONTEXTIDR is not set
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+# CONFIG_DEBUG_SET_MODULE_RONX is not set
+
+#
+# Samsung Rooting Restriction Feature
+#
+# CONFIG_SEC_RESTRICT_ROOTING is not set
+# CONFIG_SEC_RESTRICT_SETUID is not set
+# CONFIG_SEC_RESTRICT_FORK is not set
+# CONFIG_SEC_RESTRICT_ROOTING_LOG is not set
+# CONFIG_CORESIGHT is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_PERSISTENT_KEYRINGS is not set
+# CONFIG_BIG_KEYS is not set
+CONFIG_ENCRYPTED_KEYS=y
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
+CONFIG_LSM_MMAP_MIN_ADDR=4096
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y
+CONFIG_HARDENED_USERCOPY=y
+# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SEC_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
+# CONFIG_SECURITY_SELINUX_DISABLE is not set
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_FAKE_ENFORCE=y
+# CONFIG_SECURITY_SELINUX_ALWAYS_ENFORCE is not set
+# CONFIG_SECURITY_SELINUX_DEFAULT_ENFORCE is not set
+# CONFIG_SECURITY_SELINUX_ALWAYS_PERMISSIVE is not set
+CONFIG_SECURITY_SELINUX_DEFAULT_PERMISSIVE=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_YAMA is not set
+CONFIG_MST_LDO=y
+CONFIG_INTEGRITY=y
+# CONFIG_INTEGRITY_SIGNATURE is not set
+CONFIG_INTEGRITY_AUDIT=y
+# CONFIG_IMA is not set
+# CONFIG_EVM is not set
+# CONFIG_FIVE is not set
+# CONFIG_TZ_ICCC is not set
+# CONFIG_SECURITY_DEFEX is not set
+CONFIG_DEFAULT_SECURITY_SELINUX=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+CONFIG_DEFAULT_SECURITY="selinux"
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_AKCIPHER2=y
+# CONFIG_CRYPTO_RSA is not set
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_CRYPTD=y
+# CONFIG_CRYPTO_MCRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_ABLK_HELPER=y
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
+CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_ECHAINIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+CONFIG_CRYPTO_XTS=y
+# CONFIG_CRYPTO_KEYWRAP is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_CMAC is not set
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_CRCT10DIF is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_POLY1305 is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_CHACHA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_842 is not set
+CONFIG_CRYPTO_LZ4=y
+# CONFIG_CRYPTO_LZ4HC is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+# CONFIG_CRYPTO_DRBG_HASH is not set
+# CONFIG_CRYPTO_DRBG_CTR is not set
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_USER_API_RNG is not set
+# CONFIG_CRYPTO_USER_API_AEAD is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_S5P is not set
+# CONFIG_CRYPTO_DEV_CCP is not set
+CONFIG_EXYNOS_SMU=y
+CONFIG_EXYNOS_FMP=y
+CONFIG_EXYNOS_FMP_FIPS=y
+CONFIG_NODE_FOR_SELFTEST_FAIL=y
+# CONFIG_PANIC_FOR_SELFTEST_FAIL is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+
+#
+# Certificates for signature checking
+#
+# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+# CONFIG_CRYPTO_GHASH_ARM64_CE is not set
+CONFIG_CRYPTO_AES_ARM64_CE=y
+# CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
+# CONFIG_CRYPTO_CRC32_ARM64 is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+# CONFIG_CRC8 is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+CONFIG_AUDIT_COMPAT_GENERIC=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_LZ4_COMPRESS=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_DECOMPRESS_LZ4=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_REED_SOLOMON=y
+CONFIG_REED_SOLOMON_ENC8=y
+CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=y
+CONFIG_TEXTSEARCH_BM=y
+CONFIG_TEXTSEARCH_FSM=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+# CONFIG_CORDIC is not set
+# CONFIG_DDR is not set
+CONFIG_LIBFDT=y
+# CONFIG_SG_SPLIT is not set
+CONFIG_ARCH_HAS_SG_CHAIN=y
diff --git a/arch/arm64/configs/exynos7885-jackpotltekor_defconfig b/arch/arm64/configs/exynos7885-jackpotltekor_defconfig
index fb52020b26b5..72c56075f383 100755
--- a/arch/arm64/configs/exynos7885-jackpotltekor_defconfig
+++ b/arch/arm64/configs/exynos7885-jackpotltekor_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm64 4.4.148 Kernel Configuration
+# Linux/arm64 4.4.154 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@@ -363,7 +363,9 @@ CONFIG_ARCH_EXYNOS7=y
# SAMSUNG EXYNOS SoCs Support
#
# CONFIG_MACH_EXYNOS7885_NONE is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN is not set
# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN is not set
+# CONFIG_MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM is not set
CONFIG_MACH_EXYNOS7885_JACKPOTLTE_KOR=y
# CONFIG_MACH_EXYNOS7885_JACKPOT2LTE_EUR_OPEN is not set
CONFIG_EXYNOS_DTBTOOL=y
@@ -4394,6 +4396,7 @@ CONFIG_TRUSTED_UI_TOUCH_ENABLE=y
#
CONFIG_USE_CCIC=y
CONFIG_CCIC_S2MU004=y
+CONFIG_CCIC_VDM=y
# CONFIG_CCIC_S2MM005 is not set
CONFIG_CCIC_NOTIFIER=y
# CONFIG_CCIC_ALTERNATE_MODE is not set
diff --git a/arch/arm64/mach-exynos/Kconfig b/arch/arm64/mach-exynos/Kconfig
index 9ccbe4aebac4..8a9dec21ac1b 100644
--- a/arch/arm64/mach-exynos/Kconfig
+++ b/arch/arm64/mach-exynos/Kconfig
@@ -18,10 +18,18 @@ choice
config MACH_EXYNOS7885_NONE
bool "None"
+config MACH_EXYNOS7885_JACKPOTLTE_CAN_OPEN
+ bool "Galaxy A8 (SM-A530W)"
+ select EXYNOS_DTBTOOL
+
config MACH_EXYNOS7885_JACKPOTLTE_EUR_OPEN
bool "Galaxy A8 (SM-A530F)"
select EXYNOS_DTBTOOL
+config MACH_EXYNOS7885_JACKPOTLTE_JPN_DCM
+ bool "Galaxy A8 (SM-A530J)"
+ select EXYNOS_DTBTOOL
+
config MACH_EXYNOS7885_JACKPOTLTE_KOR
bool "Galaxy A8 (SM-A530N)"
select EXYNOS_DTBTOOL
diff --git a/drivers/ccic/Kconfig b/drivers/ccic/Kconfig
index 1b4d451524b4..7f30c24d4b54 100644
--- a/drivers/ccic/Kconfig
+++ b/drivers/ccic/Kconfig
@@ -20,6 +20,14 @@ config CCIC_S2MU004
If you say yes here you will get support for
for the S2MU004 USBPD chip.
+config CCIC_VDM
+ bool "Using S2MU004 USB PD VDM Message"
+ depends on USE_CCIC
+ default n
+ help
+ If you say yes here you will get support for
+ for the S2MU004 USBPD chip.
+
config CCIC_S2MM005
bool "CCIC S2MM005"
depends on I2C
diff --git a/drivers/ccic/Makefile b/drivers/ccic/Makefile
index 63102f1542fe..ab72be52a6f1 100644
--- a/drivers/ccic/Makefile
+++ b/drivers/ccic/Makefile
@@ -4,7 +4,7 @@
obj-$(CONFIG_CCIC_S2MU004) += s2mu004-usbpd.o
obj-$(CONFIG_USE_CCIC) += usbpd.o usbpd_cc.o
-obj-$(CONFIG_USE_CCIC) += usbpd_policy.o usbpd_manager.o pdic_notifier.o
+obj-$(CONFIG_USE_CCIC) += usbpd_policy.o usbpd_manager.o pdic_notifier.o ccic_misc.o
obj-$(CONFIG_CCIC_S2MM005) += s2mm005_fw.o s2mm005_cc.o s2mm005_pd.o s2mm005.o
obj-$(CONFIG_CCIC_NOTIFIER) += ccic_notifier.o ccic_sysfs.o
-obj-$(CONFIG_CCIC_ALTERNATE_MODE)+= ccic_alternate.o
\ No newline at end of file
+obj-$(CONFIG_CCIC_ALTERNATE_MODE) += ccic_alternate.o ccic_misc.o
diff --git a/drivers/ccic/ccic_misc.c b/drivers/ccic/ccic_misc.c
new file mode 100644
index 000000000000..ddd28da369cb
--- /dev/null
+++ b/drivers/ccic/ccic_misc.c
@@ -0,0 +1,253 @@
+/*
+ * driver/ccic/ccic_misc.c - S2MM005 CCIC MISC driver
+ *
+ * Copyright (C) 2017 Samsung Electronics
+ * Author: Wookwang Lee
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; If not, see .
+ *
+ */
+//serial_acm.c
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static struct ccic_misc_dev *c_dev;
+
+#define MAX_BUF 255
+#define DEXDOCK_PRODUCT_ID 0xA020
+#define NODE_OF_MISC "ccic_misc"
+#define CCIC_IOCTL_UVDM _IOWR('C', 0, struct uvdm_data)
+
+static inline int _lock(atomic_t *excl)
+{
+ if (atomic_inc_return(excl) == 1) {
+ return 0;
+ } else {
+ atomic_dec(excl);
+ return -1;
+ }
+}
+
+static inline void _unlock(atomic_t *excl)
+{
+ atomic_dec(excl);
+}
+
+static int ccic_misc_open(struct inode *inode, struct file *file)
+{
+ int ret = 0;
+
+ pr_info("%s + open success\n", __func__);
+ if (!c_dev) {
+ pr_err("%s - error : c_dev is NULL\n", __func__);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ if (_lock(&c_dev->open_excl)) {
+ pr_err("%s - error : device busy\n", __func__);
+ ret = -EBUSY;
+ goto err1;
+ }
+
+ if (!samsung_uvdm_ready()) {
+ // check if there is some connection
+ _unlock(&c_dev->open_excl);
+ pr_err("%s - error : uvdm is not ready\n", __func__);
+ ret = -EBUSY;
+ goto err1;
+ }
+
+ pr_info("%s - open success\n", __func__);
+
+ return 0;
+err1:
+err:
+ return ret;
+}
+
+static int ccic_misc_close(struct inode *inode, struct file *file)
+{
+ if (c_dev)
+ _unlock(&c_dev->open_excl);
+ samsung_uvdm_close();
+ pr_info("%s - close success\n", __func__);
+ return 0;
+}
+
+static int send_uvdm_message(void *data, int size)
+{
+ int ret;
+
+ pr_info("%s - size : %d\n", __func__, size);
+ ret = samsung_uvdm_out_request_message(data, size);
+ return ret;
+}
+
+static int receive_uvdm_message(void *data, int size)
+{
+ int ret;
+
+ pr_info("%s - size : %d\n", __func__, size);
+ ret = samsung_uvdm_in_request_message(data);
+ return ret;
+}
+
+static long
+ccic_misc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ int ret = 0;
+ void *buf = NULL;
+
+ if (_lock(&c_dev->ioctl_excl)) {
+ pr_err("%s - error : ioctl busy - cmd : %d\n", __func__, cmd);
+ ret = -EBUSY;
+ goto err2;
+ }
+
+ switch (cmd) {
+ case CCIC_IOCTL_UVDM:
+ pr_info("%s - CCIC_IOCTL_UVDM cmd\n", __func__);
+ if (copy_from_user(&c_dev->u_data, (void __user *) arg,
+ sizeof(struct uvdm_data))) {
+ ret = -EIO;
+ pr_err("%s - copy_from_user error\n", __func__);
+ goto err1;
+ }
+
+ buf = kzalloc(MAX_BUF, GFP_KERNEL);
+ if (!buf) {
+ ret = -EINVAL;
+ pr_err("%s - kzalloc error\n", __func__);
+ goto err1;
+ }
+
+ if (c_dev->u_data.size > MAX_BUF) {
+ ret = -ENOMEM;
+ pr_err("%s - user data size is %d error\n", __func__, c_dev->u_data.size);
+ goto err;
+ }
+
+ if (c_dev->u_data.dir == DIR_OUT) {
+ if (copy_from_user(buf, c_dev->u_data.pData,\
+ c_dev->u_data.size)) {
+ ret = -EIO;
+ pr_err("%s - copy_from_user error\n", __func__);
+ goto err;
+ }
+ ret = send_uvdm_message(buf, c_dev->u_data.size);
+ if (ret <= 0) {
+ pr_err("%s - send_uvdm_message error\n", __func__);
+ goto err;
+ }
+ } else {
+ ret = receive_uvdm_message(buf, c_dev->u_data.size);
+ if (ret <= 0) {
+ pr_err("%s - receive_uvdm_message error\n", __func__);
+ goto err;
+ }
+ if (copy_to_user((void __user *)c_dev->u_data.pData,
+ buf, ret)) {
+ ret = -EIO;
+ pr_err("%s - copy_to_user error\n", __func__);
+ goto err;
+ }
+ }
+ break;
+
+ default:
+ pr_err("%s - unknown ioctl cmd : %d\n", __func__, cmd);
+ ret = -ENOIOCTLCMD;
+ goto err;
+ }
+err:
+ kfree(buf);
+err1:
+ _unlock(&c_dev->ioctl_excl);
+err2:
+ return ret;
+}
+
+#ifdef CONFIG_COMPAT
+static long
+ccic_misc_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ int ret = 0;
+ pr_info("%s - cmd : %d\n", __func__, cmd);
+ ret = ccic_misc_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
+ return ret;
+}
+#endif
+
+static const struct file_operations ccic_misc_fops = {
+ .owner = THIS_MODULE,
+ .open = ccic_misc_open,
+ .release = ccic_misc_close,
+ .llseek = no_llseek,
+ .unlocked_ioctl = ccic_misc_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = ccic_misc_compat_ioctl,
+#endif
+};
+
+static struct miscdevice ccic_misc_device = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = NODE_OF_MISC,
+ .fops = &ccic_misc_fops,
+};
+
+int ccic_misc_init(void)
+{
+ int ret = 0;
+
+ ret = misc_register(&ccic_misc_device);
+ if (ret) {
+ pr_err("%s - return error : %d\n", __func__, ret);
+ goto err;
+ }
+
+ c_dev = kzalloc(sizeof(struct ccic_misc_dev), GFP_KERNEL);
+ if (!c_dev) {
+ ret = -ENOMEM;
+ pr_err("%s - kzalloc failed : %d\n", __func__, ret);
+ goto err1;
+ }
+ atomic_set(&c_dev->open_excl, 0);
+ atomic_set(&c_dev->ioctl_excl, 0);
+
+ pr_info("%s - register success\n", __func__);
+ return 0;
+err1:
+ misc_deregister(&ccic_misc_device);
+err:
+ return ret;
+}
+EXPORT_SYMBOL(ccic_misc_init);
+
+void ccic_misc_exit(void)
+{
+ pr_info("%s() called\n", __func__);
+ if (!c_dev)
+ return;
+ kfree(c_dev);
+ misc_deregister(&ccic_misc_device);
+}
+EXPORT_SYMBOL(ccic_misc_exit);
diff --git a/drivers/ccic/s2mu004-usbpd.c b/drivers/ccic/s2mu004-usbpd.c
index cfd5d7b9db83..bfa6fbd07b80 100644
--- a/drivers/ccic/s2mu004-usbpd.c
+++ b/drivers/ccic/s2mu004-usbpd.c
@@ -68,7 +68,7 @@ static int s2mu004_usbpd_reg_init(struct s2mu004_usbpd_data *_data);
static void s2mu004_dfp(struct i2c_client *i2c);
static void s2mu004_ufp(struct i2c_client *i2c);
#ifdef CONFIG_CCIC_VDM
-static int s2mu004_usbpd_check_vdm_msg(void *_data, int *val);
+static int s2mu004_usbpd_check_vdm_msg(void *_data, u64 *val);
#endif
static void s2mu004_src(struct i2c_client *i2c);
static void s2mu004_snk(struct i2c_client *i2c);
@@ -557,7 +557,7 @@ static bool s2mu004_poll_status(void *_data)
struct i2c_client *i2c = pdic_data->i2c;
struct device *dev = &i2c->dev;
u8 intr[S2MU004_MAX_NUM_INT_STATUS] = {0};
- int ret = 0;
+ int ret = 0, retry = 0;
u64 status_reg_val = 0;
ret = s2mu004_usbpd_bulk_read(i2c, S2MU004_REG_INT_STATUS0,
@@ -585,8 +585,21 @@ static bool s2mu004_poll_status(void *_data)
if ((intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
!pdic_data->lpm_mode && !pdic_data->is_water_detect)
status_reg_val |= PLUG_ATTACH;
+ else if (pdic_data->lpm_mode &&
+ (intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
+ !pdic_data->is_water_detect)
+ retry = 1;
mutex_unlock(&pdic_data->lpm_mutex);
+ if (retry) {
+ msleep(40);
+ mutex_lock(&pdic_data->lpm_mutex);
+ if ((intr[4] & S2MU004_REG_INT_STATUS4_PLUG_IRQ) &&
+ !pdic_data->lpm_mode && !pdic_data->is_water_detect)
+ status_reg_val |= PLUG_ATTACH;
+ mutex_unlock(&pdic_data->lpm_mutex);
+ }
+
#ifdef CONFIG_CCIC_VDM
/* function that support dp control */
if (pdic_data->check_msg_pass) {
@@ -674,12 +687,12 @@ static bool s2mu004_poll_status(void *_data)
#ifdef CONFIG_CCIC_VDM
/* read message if data object message */
if (status_reg_val &
- (MSG_REQUEST | MSG_SNK_CAP | MSG_SRC_CAP
+ (MSG_REQUEST | MSG_SNK_CAP
| VDM_DISCOVER_IDENTITY | VDM_DISCOVER_SVID
| VDM_DISCOVER_MODE | VDM_ENTER_MODE | VDM_EXIT_MODE
- | VDM_ATTENTION | MSG_SOFTRESET | MSG_PASS)) {
+ | VDM_ATTENTION | MSG_PASS)) {
usbpd_protocol_rx(data);
- if (status_reg_val == MSG_PASS && (pdic_data->data_role == USBPD_UFP))
+ if (status_reg_val & MSG_PASS)
s2mu004_usbpd_check_vdm_msg(data, &status_reg_val);
}
#else
@@ -688,7 +701,7 @@ static bool s2mu004_poll_status(void *_data)
(MSG_REQUEST | MSG_SNK_CAP
| VDM_DISCOVER_IDENTITY | VDM_DISCOVER_SVID
| VDM_DISCOVER_MODE | VDM_ENTER_MODE | VDM_EXIT_MODE
- | VDM_ATTENTION | MSG_SOFTRESET)) {
+ | VDM_ATTENTION)) {
usbpd_protocol_rx(data);
}
#endif
@@ -949,6 +962,7 @@ static int s2mu004_set_power_role(void *_data, int val)
} else if (val == USBPD_DRP) {
pdic_data->is_pr_swap = false;
s2mu004_assert_drp(data);
+ return 0;
} else
return(-1);
@@ -1075,19 +1089,32 @@ static void s2mu004_usbpd_set_rp_scr_sel(struct s2mu004_usbpd_data *pdic_data,
#endif
#ifdef CONFIG_CCIC_VDM
-int s2mu004_usbpd_check_vdm_msg(void *_data, int *val)
+int s2mu004_usbpd_check_vdm_msg(void *_data, u64 *val)
{
struct usbpd_data *data = (struct usbpd_data *) _data;
- int vdm_command = 0;
+ int vdm_command = 0, vdm_type = 0;
- if (data->protocol_rx.msg_header.num_data_objs == 0)
+ dev_info(data->dev, "%s ++\n", __func__);
+ if (data->protocol_rx.msg_header.num_data_objs == 0) {
+ dev_info(data->dev, "%s data_obj null\n", __func__);
return 0;
+ }
- if (data->protocol_rx.msg_header.msg_type != USBPD_Vendor_Defined)
+ if (data->protocol_rx.msg_header.msg_type != USBPD_Vendor_Defined) {
+ dev_info(data->dev, "%s msg type is wrong\n", __func__);
return 0;
+ }
vdm_command = data->protocol_rx.data_obj[0].structured_vdm.command;
+ vdm_type = data->protocol_rx.data_obj[0].structured_vdm.vdm_type;
+ if (vdm_type == Unstructured_VDM) {
+ dev_info(data->dev, "%s : uvdm msg received!\n", __func__);
+ *val |= UVDM_MSG;
+ return 0;
+ }
+
+#if 0
switch (vdm_command) {
case DisplayPort_Status_Update:
*val |= VDM_DP_STATUS_UPDATE;
@@ -1098,7 +1125,7 @@ int s2mu004_usbpd_check_vdm_msg(void *_data, int *val)
default:
return 0;
}
-
+#endif
dev_info(data->dev, "%s: check vdm mag val(%d)\n", __func__, vdm_command);
return 0;
@@ -2085,8 +2112,8 @@ static void s2mu004_usbpd_notify_detach(struct s2mu004_usbpd_data *pdic_data)
pdic_data->power_role_dual == DUAL_ROLE_PROP_PR_SRC) {
vbus_turn_on_ctrl(pdic_data, VBUS_OFF);
muic_disable_otg_detect();
- usbpd_manager_acc_detach(dev);
}
+ usbpd_manager_acc_detach(dev);
#if defined(CONFIG_DUAL_ROLE_USB_INTF)
pr_info("%s, data_role (%d)\n", __func__, pdic_data->data_role_dual);
if (pdic_data->data_role_dual == USB_STATUS_NOTIFY_ATTACH_DFP &&
@@ -2335,6 +2362,9 @@ static irqreturn_t s2mu004_irq_thread(int irq, void *data)
goto out;
}
+ if (s2mu004_get_status(pd_data, MSG_SOFTRESET))
+ usbpd_rx_soft_reset(pd_data);
+
if (s2mu004_get_status(pd_data, PLUG_DETACH)) {
#if defined(CONFIG_SEC_FACTORY)
ret = s2mu004_usbpd_check_619k(pdic_data);
diff --git a/drivers/ccic/usbpd_manager.c b/drivers/ccic/usbpd_manager.c
index 4282031c46dd..80ddce02f069 100644
--- a/drivers/ccic/usbpd_manager.c
+++ b/drivers/ccic/usbpd_manager.c
@@ -39,6 +39,9 @@
#include
#endif
+#include
+#include
+
bool force_dex_mode = false;
module_param(force_dex_mode, bool, 0755);
@@ -61,6 +64,7 @@ extern struct device *ccic_device;
void s2mu004_select_pdo(int num)
{
struct usbpd_data *pd_data = pd_noti.pd_data;
+ struct usbpd_manager_data *manager = &pd_data->manager;
bool vbus_short;
pd_data->phy_ops.get_vbus_short_check(pd_data, &vbus_short);
@@ -81,9 +85,7 @@ void s2mu004_select_pdo(int num)
pd_noti.sink_status.selected_pdo_num = num;
pr_info(" %s : PDO(%d) is selected to change\n", __func__, pd_noti.sink_status.selected_pdo_num);
- msleep(50);
-
- usbpd_manager_inform_event(pd_noti.pd_data, MANAGER_NEW_POWER_SRC);
+ schedule_delayed_work(&manager->select_pdo_handler, msecs_to_jiffies(50));
}
void select_pdo(int num)
@@ -94,6 +96,46 @@ void select_pdo(int num)
#endif
#endif
+void usbpd_manager_select_pdo_handler(struct work_struct *work)
+{
+ pr_info("%s: call select pdo handler\n", __func__);
+
+ usbpd_manager_inform_event(pd_noti.pd_data, MANAGER_NEW_POWER_SRC);
+
+}
+
+void usbpd_manager_select_pdo_cancel(struct device *dev)
+{
+ struct usbpd_data *pd_data = dev_get_drvdata(dev);
+ struct usbpd_manager_data *manager = &pd_data->manager;
+
+ cancel_delayed_work_sync(&manager->select_pdo_handler);
+}
+
+void usbpd_manager_start_discover_msg_handler(struct work_struct *work)
+{
+ struct usbpd_manager_data *manager =
+ container_of(work, struct usbpd_manager_data,
+ start_discover_msg_handler.work);
+ pr_info("%s: call handler\n", __func__);
+
+ mutex_lock(&manager->vdm_mutex);
+ if (manager->alt_sended == 0 && manager->vdm_en == 1) {
+ usbpd_manager_inform_event(pd_noti.pd_data,
+ MANAGER_START_DISCOVER_IDENTITY);
+ manager->alt_sended = 1;
+ }
+ mutex_unlock(&manager->vdm_mutex);
+}
+
+void usbpd_manager_start_discover_msg_cancel(struct device *dev)
+{
+ struct usbpd_data *pd_data = dev_get_drvdata(dev);
+ struct usbpd_manager_data *manager = &pd_data->manager;
+
+ cancel_delayed_work_sync(&manager->start_discover_msg_handler);
+}
+
static void init_source_cap_data(struct usbpd_manager_data *_data)
{
/* struct usbpd_data *pd_data = manager_to_usbpd(_data);
@@ -147,46 +189,326 @@ static void init_sink_cap_data(struct usbpd_manager_data *_data)
(data_obj + 1)->power_data_obj_variable.max_current = 500 / 10;
}
+int samsung_uvdm_ready(void)
+{
+ int uvdm_ready = false;
+ struct s2mu004_usbpd_data *pdic_data;
+ struct usbpd_data *pd_data;
+ struct usbpd_manager_data *manager;
+
+ pr_info("%s\n", __func__);
+ if(!ccic_device) {
+ pr_info("ccic_dev is null\n");
+ return -ENXIO;
+ }
+
+ pdic_data = dev_get_drvdata(ccic_device);
+ if (!pdic_data) {
+ pr_info("pdic_data is null\n");
+ return -ENXIO;
+ }
+
+ pd_data = dev_get_drvdata(pdic_data->dev);
+ if (!pd_data) {
+ pr_info("pd_data is null\n");
+ return -ENXIO;
+ }
+ manager = &pd_data->manager;
+ if (!manager) {
+ pr_info("manager is null\n");
+ return -ENXIO;
+ }
+
+ if (manager->is_samsung_accessory_enter_mode)
+ uvdm_ready = true;
+
+ pr_info("uvdm ready = %d", uvdm_ready);
+ return uvdm_ready;
+}
+
+void samsung_uvdm_close(void)
+{
+ struct s2mu004_usbpd_data *pdic_data;
+ struct usbpd_data *pd_data;
+ struct usbpd_manager_data *manager;
+
+ pr_info("%s\n", __func__);
+ if(!ccic_device) {
+ pr_info("ccic_dev is null\n");
+ return;
+ }
+
+ pdic_data = dev_get_drvdata(ccic_device);
+ if (!pdic_data) {
+ pr_info("pdic_data is null\n");
+ return;
+ }
+
+ pd_data = dev_get_drvdata(pdic_data->dev);
+ if (!pd_data) {
+ pr_info("pd_data is null\n");
+ return;
+ }
+ manager = &pd_data->manager;
+ if (!manager) {
+ pr_info("manager is null\n");
+ return;
+ }
+
+ complete(&manager->uvdm_out_wait);
+ complete(&manager->uvdm_in_wait);
+
+}
+
+void set_endian(char *src, char *dest, int size)
+{
+ int i, j;
+ int loop;
+ int dest_pos;
+ int src_pos;
+
+ loop = size / SEC_UVDM_ALIGN;
+ loop += (((size % SEC_UVDM_ALIGN) > 0) ? 1:0);
+
+ for (i = 0 ; i < loop ; i++)
+ for (j = 0 ; j < SEC_UVDM_ALIGN ; j++) {
+ src_pos = SEC_UVDM_ALIGN * i + j;
+ dest_pos = SEC_UVDM_ALIGN * i + SEC_UVDM_ALIGN - j - 1;
+ dest[dest_pos] = src[src_pos];
+ }
+}
+
+int get_checksum(char *data, int start_addr, int size)
+{
+ int checksum = 0;
+ int i;
+
+ for (i = 0; i < size; i++)
+ checksum += data[start_addr+i];
+
+ return checksum;
+}
+
+int set_uvdmset_count(int size)
+{
+ int ret = 0;
+
+ if (size <= SEC_UVDM_MAXDATA_FIRST)
+ ret = 1;
+ else {
+ ret = ((size-SEC_UVDM_MAXDATA_FIRST) / SEC_UVDM_MAXDATA_NORMAL);
+ if (((size-SEC_UVDM_MAXDATA_FIRST) % SEC_UVDM_MAXDATA_NORMAL) == 0)
+ ret += 1;
+ else
+ ret += 2;
+ }
+ return ret;
+}
+
+void set_msg_header(void *data, int msg_type, int obj_num)
+{
+ msg_header_type *msg_hdr;
+ uint8_t *SendMSG = (uint8_t *)data;
+
+ msg_hdr = (msg_header_type *)&SendMSG[0];
+ msg_hdr->msg_type = msg_type;
+ msg_hdr->num_data_objs = obj_num;
+ msg_hdr->port_data_role = USBPD_DFP;
+ return;
+
+}
+
+void set_uvdm_header(void *data, int vid, int vdm_type)
+{
+ uvdm_header *uvdm_hdr;
+ uint8_t *SendMSG = (uint8_t *)data;
+
+ uvdm_hdr = (uvdm_header *)&SendMSG[0];
+ uvdm_hdr->vendor_id = SAMSUNG_VENDOR_ID;
+ uvdm_hdr->vdm_type = vdm_type;
+ uvdm_hdr->vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
+ return;
+}
+
+void set_sec_uvdm_header(void *data, int pid, bool data_type, int cmd_type,
+ bool dir, int total_set_num, uint8_t received_data)
+{
+ s_uvdm_header *SEC_UVDM_HEADER;
+ uint8_t *SendMSG = (uint8_t *)data;
+
+ SEC_UVDM_HEADER = (s_uvdm_header *)&SendMSG[4];
+
+ SEC_UVDM_HEADER->pid = pid;
+ SEC_UVDM_HEADER->data_type = data_type;
+ SEC_UVDM_HEADER->cmd_type = cmd_type;
+ SEC_UVDM_HEADER->direction = dir;
+ SEC_UVDM_HEADER->total_set_num = total_set_num;
+ SEC_UVDM_HEADER->data = received_data;
+
+ pr_info("%s pid = 0x%x data_type=%d ,cmd_type =%d,direction= %d, total_num_of_uvdm_set = %d\n",
+ __func__, SEC_UVDM_HEADER->pid,
+ SEC_UVDM_HEADER->data_type,
+ SEC_UVDM_HEADER->cmd_type,
+ SEC_UVDM_HEADER->direction,
+ SEC_UVDM_HEADER->total_set_num);
+ return;
+}
+
+int get_data_size(int first_set, int remained_data_size)
+{
+ int ret = 0;
+
+ if (first_set)
+ ret = (remained_data_size <= SEC_UVDM_MAXDATA_FIRST) ? \
+ remained_data_size : SEC_UVDM_MAXDATA_FIRST;
+ else
+ ret = (remained_data_size <= SEC_UVDM_MAXDATA_NORMAL) ? \
+ remained_data_size : SEC_UVDM_MAXDATA_NORMAL;
+
+ return ret;
+}
+
+void set_sec_uvdm_tx_header(void *data, int first_set, int cur_set, int total_size,
+ int remained_size)
+{
+ s_tx_header *SEC_TX_HAEDER;
+ uint8_t *SendMSG = (uint8_t*)data;
+
+ if(first_set)
+ SEC_TX_HAEDER = (s_tx_header *)&SendMSG[8];
+ else
+ SEC_TX_HAEDER = (s_tx_header *)&SendMSG[4];
+ SEC_TX_HAEDER->cur_size = get_data_size(first_set,remained_size);
+ SEC_TX_HAEDER->total_size = total_size;
+ SEC_TX_HAEDER->order_cur_set = cur_set;
+ return;
+}
+
+void set_sec_uvdm_tx_tailer(void *data)
+{
+ s_tx_tailer *SEC_TX_TAILER;
+ uint8_t *SendMSG = (uint8_t *)data;
+
+ SEC_TX_TAILER = (s_tx_tailer *)&SendMSG[24];
+ SEC_TX_TAILER->checksum = get_checksum(SendMSG, 4,SEC_UVDM_CHECKSUM_COUNT);
+ return;
+}
+
+void set_sec_uvdm_rx_header(void *data, int cur_num, int cur_set, int ack)
+{
+ s_rx_header *SEC_RX_HEADER;
+ uint8_t *SendMSG = (uint8_t*)data;
+
+ SEC_RX_HEADER = (s_rx_header *)&SendMSG[4];
+ SEC_RX_HEADER->order_cur_set = cur_num;
+ SEC_RX_HEADER->rcv_data_size = cur_set;
+ SEC_RX_HEADER->result_value = ack;
+
+ return;
+}
+
int usbpd_manager_send_samsung_uvdm_message(void *data, const char *buf, size_t size)
{
struct s2mu004_usbpd_data *pdic_data = data;
struct usbpd_data *pd_data = dev_get_drvdata(pdic_data->dev);
- struct policy_data *policy = &pd_data->policy;
+ struct usbpd_manager_data *manager = &pd_data->manager;
int received_data = 0;
int data_role = 0;
int power_role = 0;
if ((buf == NULL)||(size < sizeof(unsigned int))) {
- pr_info("%s given data is not valid !\n", __func__);
+ pr_err("%s given data is not valid !\n", __func__);
return -EINVAL;
}
sscanf(buf, "%d", &received_data);
- data_role = pd_data->phy_ops.get_data_role(pd_data, &data_role);
+ pd_data->phy_ops.get_data_role(pd_data, &data_role);
if (data_role == USBPD_UFP) {
- pr_info("%s, skip, now data role is ufp\n", __func__);
+ pr_err("%s, skip, now data role is ufp\n", __func__);
return 0;
}
data_role = pd_data->phy_ops.get_power_role(pd_data, &power_role);
- policy->tx_msg_header.msg_type = USBPD_UVDM_MSG;
- policy->tx_msg_header.port_data_role = USBPD_DFP;
- policy->tx_msg_header.port_power_role = power_role;
- policy->tx_data_obj[0].unstructured_vdm.vendor_id = SAMSUNG_VENDOR_ID;
- policy->tx_data_obj[0].unstructured_vdm.vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
- policy->tx_data_obj[1].object = received_data;
-
- if (policy->tx_data_obj[1].sec_uvdm_header.data_type == SEC_UVDM_SHORT_DATA) {
+ manager->uvdm_msg_header.msg_type = USBPD_UVDM_MSG;
+ manager->uvdm_msg_header.port_data_role = USBPD_DFP;
+ manager->uvdm_msg_header.port_power_role = power_role;
+ manager->uvdm_data_obj[0].unstructured_vdm.vendor_id = SAMSUNG_VENDOR_ID;
+ manager->uvdm_data_obj[0].unstructured_vdm.vendor_defined = SEC_UVDM_UNSTRUCTURED_VDM;
+ manager->uvdm_data_obj[1].object = received_data;
+ if (manager->uvdm_data_obj[1].sec_uvdm_header.data_type == SEC_UVDM_SHORT_DATA) {
pr_info("%s - process short data!\n", __func__);
// process short data
// phase 1. fill message header
- policy->tx_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
+ manager->uvdm_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
// phase 2. fill uvdm header (already filled)
// phase 3. fill sec uvdm header
- policy->tx_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
+ manager->uvdm_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
+ } else {
+ pr_info("%s - process long data!\n", __func__);
+ // process long data
+ // phase 1. fill message header
+ // phase 2. fill uvdm header
+ // phase 3. fill sec uvdm header
+
+ }
+ usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
+ return 0;
+}
+
+ssize_t samsung_uvdm_out_request_message(void *data, size_t size)
+{
+ struct s2mu004_usbpd_data *pdic_data;
+ struct usbpd_data *pd_data;
+ struct usbpd_manager_data *manager;
+ uint8_t *SEC_DATA;
+ uint8_t rcv_data[MAX_INPUT_DATA] = {0,};
+ int need_set_cnt = 0;
+ int cur_set_data = 0;
+ int cur_set_num = 0;
+ int remained_data_size = 0;
+ int accumulated_data_size = 0;
+ int received_data_index = 0;
+ int time_left = 0;
+ int i;
+
+ pr_info("%s++\n", __func__);
+ if(!ccic_device) {
+ pr_err("ccic_dev is null\n");
+ return -ENXIO;
+ }
+
+ pdic_data = dev_get_drvdata(ccic_device);
+ if (!pdic_data) {
+ pr_err("pdic_data is null\n");
+ return -ENXIO;
+ }
+
+ pd_data = dev_get_drvdata(pdic_data->dev);
+ if (!pd_data) {
+ pr_err("pd_data is null\n");
+ return -ENXIO;
+ }
+ manager = &pd_data->manager;
+ if (!manager) {
+ pr_err("manager is null\n");
+ return -ENXIO;
+ }
+
+ pr_info("%s \n", __func__);
+ set_msg_header(&manager->uvdm_msg_header,USBPD_Vendor_Defined,7);
+ set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
+
+ if (size <= 1) {
+ pr_info("%s - process short data!\n", __func__);
+ // process short data
+ // phase 1. fill message header
+ manager->uvdm_msg_header.num_data_objs = 2; // VDM Header + 6 VDOs = MAX 7
+ // phase 2. fill uvdm header (already filled)
+ // phase 3. fill sec uvdm header
+ manager->uvdm_data_obj[1].sec_uvdm_header.total_number_of_uvdm_set = 1;
} else {
pr_info("%s - process long data!\n", __func__);
// process long data
@@ -194,13 +516,252 @@ int usbpd_manager_send_samsung_uvdm_message(void *data, const char *buf, size_t
// phase 2. fill uvdm header
// phase 3. fill sec uvdm header
// phase 4.5.6.7 fill sec data header , data , sec data tail and so on.
+
+ set_endian(data, rcv_data, size);
+ need_set_cnt = set_uvdmset_count(size);
+ manager->uvdm_first_req = true;
+ manager->uvdm_dir = DIR_OUT;
+ cur_set_num = 1;
+ accumulated_data_size = 0;
+ remained_data_size = size;
+
+ if (manager->uvdm_first_req)
+ set_sec_uvdm_header(&manager->uvdm_data_obj[0], manager->Product_ID,
+ SEC_UVDM_LONG_DATA,SEC_UVDM_ININIATOR, DIR_OUT,
+ need_set_cnt, 0);
+ while (cur_set_num <= need_set_cnt) {
+ cur_set_data = 0;
+ time_left = 0;
+ set_sec_uvdm_tx_header(&manager->uvdm_data_obj[0], manager->uvdm_first_req,
+ cur_set_num, size, remained_data_size);
+ cur_set_data = get_data_size(manager->uvdm_first_req,remained_data_size);
+
+ pr_info("%s current set data size: %d, total data size %ld, current uvdm set num %d\n", __func__, cur_set_data, size, cur_set_num);
+
+ if (manager->uvdm_first_req) {
+ SEC_DATA = (uint8_t *)&manager->uvdm_data_obj[3];
+ for ( i = 0; i < SEC_UVDM_MAXDATA_FIRST; i++)
+ SEC_DATA[i] = rcv_data[received_data_index++];
+ } else {
+ SEC_DATA = (uint8_t *)&manager->uvdm_data_obj[2];
+ for ( i = 0; i < SEC_UVDM_MAXDATA_NORMAL; i++)
+ SEC_DATA[i] = rcv_data[received_data_index++];
+ }
+
+ set_sec_uvdm_tx_tailer(&manager->uvdm_data_obj[0]);
+
+ reinit_completion(&manager->uvdm_out_wait);
+ usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
+
+ time_left = wait_for_completion_interruptible_timeout(&manager->uvdm_out_wait, msecs_to_jiffies(SEC_UVDM_WAIT_MS));
+ if (time_left <= 0) {
+ pr_err("%s tiemout \n",__func__);
+ return -ETIME;
+ }
+ accumulated_data_size += cur_set_data;
+ remained_data_size -= cur_set_data;
+ if (manager->uvdm_first_req)
+ manager->uvdm_first_req = false;
+ cur_set_num++;
+ }
+ return size;
}
- usbpd_send_msg(pd_data, &policy->tx_msg_header, policy->tx_data_obj);
-
return 0;
}
+int samsung_uvdm_in_request_message(void *data)
+{
+ struct s2mu004_usbpd_data *pdic_data;
+ struct usbpd_data *pd_data;
+ struct usbpd_manager_data *manager;
+ struct policy_data *policy;
+ uint8_t in_data[MAX_INPUT_DATA] = {0,};
+
+ s_uvdm_header SEC_RES_HEADER;
+ s_tx_header SEC_TX_HEADER;
+ s_tx_tailer SEC_TX_TAILER;
+ data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
+ msg_header_type uvdm_msg_header;
+
+ int cur_set_data = 0;
+ int cur_set_num = 0;
+ int total_set_num = 0;
+ int rcv_data_size = 0;
+ int total_rcv_size = 0;
+ int ack = 0;
+ int size = 0;
+ int time_left = 0;
+ int i;
+ int cal_checksum = 0;
+
+ pr_info("%s\n", __func__);
+
+ if(!ccic_device)
+ return -ENXIO;
+
+ pdic_data = dev_get_drvdata(ccic_device);
+ if (!pdic_data) {
+ pr_err("pdic_data is null\n");
+ return -ENXIO;
+ }
+
+ pd_data = dev_get_drvdata(pdic_data->dev);
+ if (!pd_data)
+ return -ENXIO;
+
+ manager = &pd_data->manager;
+ if (!manager)
+ return -ENXIO;
+ policy = &pd_data->policy;
+ if (!policy)
+ return -ENXIO;
+
+ manager->uvdm_dir = DIR_IN;
+ manager->uvdm_first_req = true;
+ uvdm_msg_header.word = policy->rx_msg_header.word;
+
+ /* 2. Common : Fill the MSGHeader */
+ set_msg_header(&manager->uvdm_msg_header, USBPD_Vendor_Defined, 2);
+ /* 3. Common : Fill the UVDMHeader*/
+ set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
+
+ /* 4. Common : Fill the First SEC_VDMHeader*/
+ if(manager->uvdm_first_req)
+ set_sec_uvdm_header(&manager->uvdm_data_obj[0], manager->Product_ID,\
+ SEC_UVDM_LONG_DATA, SEC_UVDM_ININIATOR, DIR_IN, 0, 0);
+
+ /* 5. Send data to PDIC */
+ reinit_completion(&manager->uvdm_in_wait);
+ usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
+
+ cur_set_num = 0;
+ total_set_num = 1;
+
+ do {
+ time_left =
+ wait_for_completion_interruptible_timeout(&manager->uvdm_in_wait,
+ msecs_to_jiffies(SEC_UVDM_WAIT_MS));
+ if (time_left <= 0) {
+ pr_err("%s timeout\n", __func__);
+ return -ETIME;
+ }
+
+ /* read data */
+ uvdm_msg_header.word = policy->rx_msg_header.word;
+ for (i = 0; i < uvdm_msg_header.num_data_objs; i++)
+ uvdm_data_obj[i].object = policy->rx_data_obj[i].object;
+
+ if (manager->uvdm_first_req) {
+ SEC_RES_HEADER.object = uvdm_data_obj[1].object;
+ SEC_TX_HEADER.object = uvdm_data_obj[2].object;
+
+ if (SEC_RES_HEADER.data_type == TYPE_SHORT) {
+ in_data[rcv_data_size++] = SEC_RES_HEADER.data;
+ return rcv_data_size;
+ } else {
+ /* 1. check the data size received */
+ size = SEC_TX_HEADER.total_size;
+ cur_set_data = SEC_TX_HEADER.cur_size;
+ cur_set_num = SEC_TX_HEADER.order_cur_set;
+ total_set_num = SEC_RES_HEADER.total_set_num;
+
+ manager->uvdm_first_req = false;
+ /* 2. copy data to buffer */
+ for (i = 0; i < SEC_UVDM_MAXDATA_FIRST; i++) {
+ in_data[rcv_data_size++] =uvdm_data_obj[3+i/SEC_UVDM_ALIGN].byte[i%SEC_UVDM_ALIGN];
+ }
+ total_rcv_size += cur_set_data;
+ manager->uvdm_first_req = false;
+ }
+ } else {
+ SEC_TX_HEADER.object = uvdm_data_obj[1].object;
+ cur_set_data = SEC_TX_HEADER.cur_size;
+ cur_set_num = SEC_TX_HEADER.order_cur_set;
+ /* 2. copy data to buffer */
+ for (i = 0 ; i < SEC_UVDM_MAXDATA_NORMAL; i++)
+ in_data[rcv_data_size++] = uvdm_data_obj[2+i/SEC_UVDM_ALIGN].byte[i%SEC_UVDM_ALIGN];
+ total_rcv_size += cur_set_data;
+ }
+ /* 3. Check Checksum */
+ SEC_TX_TAILER.object =uvdm_data_obj[6].object;
+ cal_checksum = get_checksum((char *)&uvdm_data_obj[0], 4, SEC_UVDM_CHECKSUM_COUNT);
+ ack = (cal_checksum == SEC_TX_TAILER.checksum) ? RX_ACK : RX_NAK;
+
+ /* 5. Common : Fill the MSGHeader */
+ set_msg_header(&manager->uvdm_msg_header, USBPD_Vendor_Defined, 2);
+ /* 5.1. Common : Fill the UVDMHeader*/
+ set_uvdm_header(&manager->uvdm_data_obj[0], SAMSUNG_VENDOR_ID, 0);
+ /* 5.2. Common : Fill the First SEC_VDMHeader*/
+
+ set_sec_uvdm_rx_header(&manager->uvdm_data_obj[0], cur_set_num, cur_set_data, ack);
+ reinit_completion(&manager->uvdm_in_wait);
+ usbpd_manager_inform_event(pd_data, MANAGER_UVDM_SEND_MESSAGE);
+ } while ( cur_set_num < total_set_num);
+
+ set_endian(in_data, data, size);
+
+ return size;
+
+}
+
+void usbpd_manager_receive_samsung_uvdm_message(struct usbpd_data *pd_data)
+{
+ struct policy_data *policy = &pd_data->policy;
+ int i = 0;
+ msg_header_type uvdm_msg_header;
+ data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
+ struct usbpd_manager_data *manager = &pd_data->manager;
+ s_uvdm_header SEC_UVDM_RES_HEADER;
+ //s_uvdm_header SEC_UVDM_HEADER;
+ s_rx_header SEC_UVDM_RX_HEADER;
+ uvdm_msg_header.word = policy->rx_msg_header.word;
+
+
+ for (i = 0; i < uvdm_msg_header.num_data_objs; i++)
+ uvdm_data_obj[i].object = policy->rx_data_obj[i].object;
+
+ uvdm_msg_header.word = policy->rx_msg_header.word;
+
+ pr_info("%s dir %s \n", __func__, (manager->uvdm_dir==DIR_OUT)?"OUT":"IN");
+ if (manager->uvdm_dir == DIR_OUT) {
+ if (manager->uvdm_first_req) {
+ SEC_UVDM_RES_HEADER.object = uvdm_data_obj[1].object;
+ if (SEC_UVDM_RES_HEADER.data_type == TYPE_LONG) {
+ if (SEC_UVDM_RES_HEADER.cmd_type == RES_ACK) {
+ SEC_UVDM_RX_HEADER.object = uvdm_data_obj[2].object;
+ if (SEC_UVDM_RX_HEADER.result_value != RX_ACK)
+ pr_err("%s Busy or Nak received.\n", __func__);
+ } else
+ pr_err("%s Response type is wrong.\n", __func__);
+ } else {
+ if ( SEC_UVDM_RES_HEADER.cmd_type == RES_ACK)
+ pr_err("%s Short packet: ack received\n", __func__);
+ else
+ pr_err("%s Short packet: Response type is wrong\n", __func__);
+ }
+ /* Dir: out */
+ } else {
+ SEC_UVDM_RX_HEADER.object = uvdm_data_obj[1].object;
+ if (SEC_UVDM_RX_HEADER.result_value != RX_ACK)
+ pr_err("%s Busy or Nak received.\n", __func__);
+ }
+ complete(&manager->uvdm_out_wait);
+ } else {
+ if (manager->uvdm_first_req) {
+ SEC_UVDM_RES_HEADER.object = uvdm_data_obj[1].object;
+ if (SEC_UVDM_RES_HEADER.cmd_type != RES_ACK) {
+ pr_err("%s Busy or Nak received.\n", __func__);
+ return;
+ }
+ }
+
+ complete(&manager->uvdm_in_wait);
+ }
+
+ return;
+}
+
void usbpd_manager_plug_attach(struct device *dev, muic_attached_dev_t new_dev)
{
#ifdef CONFIG_BATTERY_SAMSUNG
@@ -271,7 +832,7 @@ int usbpd_manager_command_to_policy(struct device *dev,
struct usbpd_data *pd_data = dev_get_drvdata(dev);
struct usbpd_manager_data *manager = &pd_data->manager;
- manager->cmd = command;
+ manager->cmd |= command;
usbpd_kick_policy_work(dev);
@@ -321,6 +882,17 @@ void usbpd_manager_inform_event(struct usbpd_data *pd_data,
usbpd_manager_command_to_policy(pd_data->dev,
MANAGER_REQ_NEW_POWER_SRC);
break;
+ case MANAGER_UVDM_SEND_MESSAGE:
+ usbpd_manager_command_to_policy(pd_data->dev,
+ MANAGER_REQ_UVDM_SEND_MESSAGE);
+ break;
+ case MANAGER_UVDM_RECEIVE_MESSAGE:
+ usbpd_manager_receive_samsung_uvdm_message(pd_data);
+ break;
+ case MANAGER_START_DISCOVER_IDENTITY:
+ usbpd_manager_command_to_policy(pd_data->dev,
+ MANAGER_REQ_VDM_DISCOVER_IDENTITY);
+ break;
default:
pr_info("%s: not matched event(%d)\n", __func__, event);
}
@@ -339,12 +911,12 @@ bool usbpd_manager_vdm_request_enabled(struct usbpd_data *pd_data)
return(1);
*/
- if (manager->alt_sended)
- return false;
- else {
- manager->alt_sended = 1;
- return true;
- }
+
+ manager->vdm_en = 1;
+
+ schedule_delayed_work(&manager->start_discover_msg_handler,
+ msecs_to_jiffies(50));
+ return true;
}
bool usbpd_manager_power_role_swap(struct usbpd_data *pd_data)
@@ -474,6 +1046,7 @@ void usbpd_manager_acc_detach_handler(struct work_struct *wk)
manager->acc_type = CCIC_DOCK_DETACHED;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
+ manager->is_samsung_accessory_enter_mode = false;
}
}
}
@@ -622,6 +1195,10 @@ int usbpd_manager_get_modes(struct usbpd_data *pd_data)
int usbpd_manager_enter_mode(struct usbpd_data *pd_data)
{
+ struct policy_data *policy = &pd_data->policy;
+ struct usbpd_manager_data *manager = &pd_data->manager;
+ manager->Standard_Vendor_ID = policy->rx_data_obj[0].structured_vdm.svid;
+ manager->is_samsung_accessory_enter_mode = true;
return 0;
}
@@ -836,12 +1413,18 @@ void usbpd_init_manager_val(struct usbpd_data *pd_data)
pr_info("%s\n", __func__);
manager->alt_sended = 0;
+ manager->cmd = 0;
+ manager->vdm_en = 0;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
manager->Device_Version = 0;
manager->SVID_0 = 0;
manager->SVID_1 = 0;
manager->Standard_Vendor_ID = 0;
+ reinit_completion(&manager->uvdm_out_wait);
+ reinit_completion(&manager->uvdm_in_wait);
+ usbpd_manager_select_pdo_cancel(pd_data->dev);
+ usbpd_manager_start_discover_msg_cancel(pd_data->dev);
}
int usbpd_init_manager(struct usbpd_data *pd_data)
@@ -860,11 +1443,13 @@ int usbpd_init_manager(struct usbpd_data *pd_data)
fp_select_pdo = s2mu004_select_pdo;
#endif
#endif
+ mutex_init(&manager->vdm_mutex);
manager->pd_data = pd_data;
manager->power_role_swap = true;
manager->data_role_swap = true;
manager->vconn_source_swap = true;
manager->alt_sended = 0;
+ manager->vdm_en = 0;
manager->acc_type = 0;
manager->Vendor_ID = 0;
manager->Product_ID = 0;
@@ -872,11 +1457,22 @@ int usbpd_init_manager(struct usbpd_data *pd_data)
manager->SVID_0 = 0;
manager->SVID_1 = 0;
manager->Standard_Vendor_ID = 0;
+ init_completion(&manager->uvdm_out_wait);
+ init_completion(&manager->uvdm_in_wait);
usbpd_manager_register_switch_device(1);
init_source_cap_data(manager);
init_sink_cap_data(manager);
INIT_DELAYED_WORK(&manager->acc_detach_handler, usbpd_manager_acc_detach_handler);
+ INIT_DELAYED_WORK(&manager->select_pdo_handler, usbpd_manager_select_pdo_handler);
+ INIT_DELAYED_WORK(&manager->start_discover_msg_handler,
+ usbpd_manager_start_discover_msg_handler);
+
+ ret = ccic_misc_init();
+ if (ret) {
+ pr_info("ccic misc register is failed, error %d\n", ret);
+
+ }
pr_info("%s done\n", __func__);
return ret;
}
diff --git a/drivers/ccic/usbpd_policy.c b/drivers/ccic/usbpd_policy.c
index dd542c2f9e82..5e733ba910c8 100644
--- a/drivers/ccic/usbpd_policy.c
+++ b/drivers/ccic/usbpd_policy.c
@@ -28,8 +28,8 @@
} while (0);
#define CHECK_CMD(pd, event, ret) do {\
- if (pd->manager.cmd == event) {\
- pd->manager.cmd = 0; \
+ if (pd->manager.cmd & event) {\
+ pd->manager.cmd &= ~event; \
return ret;\
} \
} while (0);
@@ -202,6 +202,7 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
CHECK_MSG(pd_data, VDM_ATTENTION, PE_DFP_VDM_Attention_Request);
CHECK_MSG(pd_data, VDM_DP_STATUS_UPDATE, PE_UFP_VDM_Evaluate_Status);
CHECK_MSG(pd_data, VDM_DP_CONFIGURE, PE_UFP_VDM_Evaluate_Configure);
+ CHECK_MSG(pd_data, UVDM_MSG, PE_DFP_UVDM_Receive_Message);
CHECK_CMD(pd_data, MANAGER_REQ_GET_SNKCAP, PE_SRC_Get_Sink_Cap);
CHECK_CMD(pd_data, MANAGER_REQ_GOTOMIN, PE_SRC_Transition_Supply);
@@ -209,6 +210,8 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
CHECK_CMD(pd_data, MANAGER_REQ_PR_SWAP, PE_PRS_SRC_SNK_Send_Swap);
CHECK_CMD(pd_data, MANAGER_REQ_DR_SWAP, PE_DRS_Evaluate_Send_Port);
CHECK_CMD(pd_data, MANAGER_REQ_VCONN_SWAP, PE_VCS_Send_Swap);
+ CHECK_CMD(pd_data, MANAGER_REQ_UVDM_SEND_MESSAGE,
+ PE_DFP_UVDM_Send_Message);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_IDENTITY, PE_DFP_VDM_Identity_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_SVID, PE_DFP_VDM_SVIDs_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DISCOVER_MODE, PE_DFP_VDM_Modes_Request);
@@ -225,12 +228,8 @@ policy_state usbpd_policy_src_ready(struct policy_data *policy)
*/
pd_data->phy_ops.get_data_role(pd_data, &data_role);
- if (data_role == USBPD_DFP) {
- if (usbpd_manager_vdm_request_enabled(pd_data)) {
- msleep(tDiscoverIdentity);
- return PE_DFP_VDM_Identity_Request;
- }
- }
+ if (data_role == USBPD_DFP)
+ usbpd_manager_vdm_request_enabled(pd_data);
return PE_SRC_Ready;
}
@@ -393,6 +392,7 @@ policy_state usbpd_policy_src_send_soft_reset(struct policy_data *policy)
policy_state usbpd_policy_src_soft_reset(struct policy_data *policy)
{
+#if 0
struct usbpd_data *pd_data = policy_to_usbpd(policy);
if (usbpd_send_ctrl_msg(pd_data, &policy->tx_msg_header,
@@ -400,6 +400,8 @@ policy_state usbpd_policy_src_soft_reset(struct policy_data *policy)
return PE_SRC_Send_Capabilities;
else
return PE_SRC_Hard_Reset;
+#endif
+ return PE_SRC_Send_Capabilities;
}
policy_state usbpd_policy_snk_startup(struct policy_data *policy)
@@ -551,6 +553,7 @@ policy_state usbpd_policy_snk_ready(struct policy_data *policy)
CHECK_MSG(pd_data, VDM_ATTENTION, PE_DFP_VDM_Attention_Request);
CHECK_MSG(pd_data, VDM_DP_STATUS_UPDATE, PE_UFP_VDM_Evaluate_Status);
CHECK_MSG(pd_data, VDM_DP_CONFIGURE, PE_UFP_VDM_Evaluate_Configure);
+ CHECK_MSG(pd_data, UVDM_MSG, PE_DFP_UVDM_Receive_Message);
CHECK_CMD(pd_data, MANAGER_REQ_NEW_POWER_SRC, PE_SNK_Select_Capability);
CHECK_CMD(pd_data, MANAGER_REQ_PR_SWAP, PE_PRS_SNK_SRC_Send_Swap);
@@ -563,15 +566,12 @@ policy_state usbpd_policy_snk_ready(struct policy_data *policy)
CHECK_CMD(pd_data, MANAGER_REQ_VDM_ENTER_MODE, PE_DFP_VDM_Mode_Entry_Request);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_STATUS_UPDATE, PE_DFP_VDM_Status_Update);
CHECK_CMD(pd_data, MANAGER_REQ_VDM_DisplayPort_Configure, PE_DFP_VDM_DisplayPort_Configure);
+ CHECK_CMD(pd_data, MANAGER_REQ_UVDM_SEND_MESSAGE,PE_DFP_UVDM_Send_Message);
pd_data->phy_ops.get_data_role(pd_data, &data_role);
- if (data_role == USBPD_DFP) {
- if (usbpd_manager_vdm_request_enabled(pd_data)) {
- msleep(tDiscoverIdentity);
- return PE_DFP_VDM_Identity_Request;
- }
- }
+ if (data_role == USBPD_DFP)
+ usbpd_manager_vdm_request_enabled(pd_data);
return PE_SNK_Ready;
}
@@ -642,6 +642,7 @@ policy_state usbpd_policy_snk_get_source_cap(struct policy_data *policy)
policy_state usbpd_policy_snk_soft_reset(struct policy_data *policy)
{
+#if 0
struct usbpd_data *pd_data = policy_to_usbpd(policy);
if (usbpd_send_ctrl_msg(pd_data, &policy->tx_msg_header,
@@ -649,6 +650,8 @@ policy_state usbpd_policy_snk_soft_reset(struct policy_data *policy)
return PE_SNK_Wait_for_Capabilities;
else
return PE_SNK_Hard_Reset;
+#endif
+ return PE_SNK_Wait_for_Capabilities;
}
policy_state usbpd_policy_drs_evaluate_port(struct policy_data *policy)
@@ -1695,9 +1698,17 @@ policy_state usbpd_policy_ufp_vdm_attention_request(struct policy_data *policy)
policy_state usbpd_policy_ufp_vdm_evaluate_status(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
+ pd_data->phy_ops.get_power_role(pd_data, &power_role);
+
+ if (power_role == USBPD_SINK)
+ return PE_SNK_Ready;
+ else
+ return PE_SRC_Ready;
+
/* Todo
check DPM evaluate request to inform status
*/
@@ -1708,7 +1719,6 @@ policy_state usbpd_policy_ufp_vdm_evaluate_status(struct policy_data *policy)
else
return PE_UFP_VDM_Mode_Entry_NAK;
*/
- return PE_UFP_VDM_Evaluate_Status;
}
policy_state usbpd_policy_ufp_vdm_status_ack(struct policy_data *policy)
@@ -1776,9 +1786,17 @@ policy_state usbpd_policy_ufp_vdm_status_nak(struct policy_data *policy)
policy_state usbpd_policy_ufp_vdm_evaluate_configure(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
+ pd_data->phy_ops.get_power_role(pd_data, &power_role);
+
+ if (power_role == USBPD_SINK)
+ return PE_SNK_Ready;
+ else
+ return PE_SRC_Ready;
+
/* Todo
check DPM evaluate request to inform status
*/
@@ -1789,7 +1807,6 @@ policy_state usbpd_policy_ufp_vdm_evaluate_configure(struct policy_data *policy)
else
return PE_UFP_VDM_Mode_Entry_NAK;
*/
- return PE_UFP_VDM_Evaluate_Configure;
}
policy_state usbpd_policy_ufp_vdm_configure_ack(struct policy_data *policy)
@@ -1987,6 +2004,7 @@ policy_state usbpd_policy_dfp_vdm_svids_naked(struct policy_data *policy)
policy_state usbpd_policy_dfp_vdm_modes_request(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ struct usbpd_manager_data *manager = &pd_data->manager;
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
@@ -1998,7 +2016,7 @@ policy_state usbpd_policy_dfp_vdm_modes_request(struct policy_data *policy)
policy->tx_msg_header.port_power_role = power_role;
policy->tx_msg_header.num_data_objs = 1;
- policy->tx_data_obj[0].structured_vdm.svid = PD_SID_1;
+ policy->tx_data_obj[0].structured_vdm.svid = manager->SVID_0;
policy->tx_data_obj[0].structured_vdm.vdm_type = Structured_VDM;
policy->tx_data_obj[0].structured_vdm.version = 0;
policy->tx_data_obj[0].structured_vdm.obj_pos = 1;
@@ -2041,6 +2059,7 @@ policy_state usbpd_policy_dfp_vdm_modes_naked(struct policy_data *policy)
policy_state usbpd_policy_dfp_vdm_entry_request(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ struct usbpd_manager_data *manager = &pd_data->manager;
int power_role = 0;
dev_info(pd_data->dev, "%s\n", __func__);
@@ -2053,7 +2072,7 @@ policy_state usbpd_policy_dfp_vdm_entry_request(struct policy_data *policy)
policy->tx_msg_header.num_data_objs = 1;
policy->tx_data_obj[0].object = 0;
- policy->tx_data_obj[0].structured_vdm.svid = PD_SID_1;
+ policy->tx_data_obj[0].structured_vdm.svid = manager->SVID_0;
policy->tx_data_obj[0].structured_vdm.vdm_type = Structured_VDM;
policy->tx_data_obj[0].structured_vdm.version = 0;
policy->tx_data_obj[0].structured_vdm.obj_pos = 1;/* Todo select which_mode */
@@ -2288,6 +2307,43 @@ policy_state usbpd_policy_dfp_vdm_displayport_configure_naked(struct policy_data
return usbpd_policy_dfp_vdm_response(policy, MANAGER_DisplayPort_Configure_NACKED);
}
+policy_state usbpd_policy_dfp_uvdm_send_message(struct policy_data *policy)
+{
+ struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ struct usbpd_manager_data *manager = &pd_data->manager;
+ int power_role = 0;
+
+ dev_info(pd_data->dev, "%s\n", __func__);
+
+ pd_data->phy_ops.set_check_msg_pass(pd_data, CHECK_MSG_PASS);
+
+ usbpd_send_msg(pd_data, &manager->uvdm_msg_header, manager->uvdm_data_obj);
+
+ pd_data->phy_ops.get_power_role(pd_data, &power_role);
+
+ if (power_role == USBPD_SOURCE)
+ return PE_SRC_Ready;
+ else
+ return PE_SNK_Ready;
+}
+
+policy_state usbpd_policy_dfp_uvdm_receive_message(struct policy_data *policy)
+{
+ struct usbpd_data *pd_data = policy_to_usbpd(policy);
+ int power_role = 0;
+
+ dev_info(pd_data->dev, "%s\n", __func__);
+
+ usbpd_manager_inform_event(pd_data, MANAGER_UVDM_RECEIVE_MESSAGE);
+
+ pd_data->phy_ops.get_power_role(pd_data, &power_role);
+
+ if (power_role == USBPD_SOURCE)
+ return PE_SRC_Ready;
+ else
+ return PE_SNK_Ready;
+}
+
policy_state usbpd_error_recovery(struct policy_data *policy)
{
struct usbpd_data *pd_data = policy_to_usbpd(policy);
@@ -2660,7 +2716,12 @@ void usbpd_policy_work(struct work_struct *work)
case PE_DFP_VDM_DisplayPort_Configure_NAKed:
next_state = usbpd_policy_dfp_vdm_displayport_configure_naked(policy);
break;
-
+ case PE_DFP_UVDM_Send_Message:
+ next_state = usbpd_policy_dfp_uvdm_send_message(policy);
+ break;
+ case PE_DFP_UVDM_Receive_Message:
+ next_state = usbpd_policy_dfp_uvdm_receive_message(policy);
+ break;
case Error_Recovery:
next_state = usbpd_error_recovery(policy);
store_usblog_notify(NOTIFY_FUNCSTATE, (void *)&next_state, NULL);
@@ -2703,6 +2764,7 @@ void usbpd_policy_work(struct work_struct *work)
}
break;
}
+ dev_info(pd_data->dev, "%s saved state %x next_state %x \n", __func__, saved_state, next_state);
} while (saved_state != next_state);
policy->state = next_state;
diff --git a/drivers/net/ethernet/broadcom/Makefile b/drivers/net/ethernet/broadcom/Makefile
index d55b6d8e4275..00584d78b3e0 100644
--- a/drivers/net/ethernet/broadcom/Makefile
+++ b/drivers/net/ethernet/broadcom/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_BNX2) += bnx2.o
obj-$(CONFIG_CNIC) += cnic.o
obj-$(CONFIG_BNX2X) += bnx2x/
obj-$(CONFIG_SB1250_MAC) += sb1250-mac.o
+obj-$(CONFIG_TIGON3) += tg3.o
obj-$(CONFIG_BGMAC) += bgmac.o
obj-$(CONFIG_SYSTEMPORT) += bcmsysport.o
obj-$(CONFIG_BNXT) += bnxt/
diff --git a/include/linux/ccic/ccic_misc.h b/include/linux/ccic/ccic_misc.h
new file mode 100644
index 000000000000..755840090403
--- /dev/null
+++ b/include/linux/ccic/ccic_misc.h
@@ -0,0 +1,52 @@
+/*
+ * driver/ccic/ccic_misc.h - S2MM005 CCIC MISC driver
+ *
+ * Copyright (C) 2017 Samsung Electronics
+ * Author: Wookwang Lee
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; If not, see .
+ *
+ */
+
+enum uvdm_data_type {
+ TYPE_SHORT = 0,
+ TYPE_LONG,
+};
+
+enum uvdm_direction_type {
+ DIR_OUT = 0,
+ DIR_IN,
+};
+
+struct uvdm_data {
+ unsigned short pid; /* Product ID */
+ char type; /* uvdm_data_type */
+ char dir; /* uvdm_direction_type */
+ unsigned int size; /* data size */
+ void __user *pData; /* data pointer */
+};
+
+struct ccic_misc_dev {
+ struct uvdm_data u_data;
+ atomic_t open_excl;
+ atomic_t ioctl_excl;
+ int (*uvdm_write)(void *data, int size);
+ int (*uvdm_read)(void *data, int size);
+};
+
+extern int ccic_misc_init(void);
+extern ssize_t samsung_uvdm_out_request_message(void *data, size_t size);
+extern int samsung_uvdm_in_request_message(void *data);
+extern int samsung_uvdm_ready(void);
+extern void samsung_uvdm_close(void);
diff --git a/include/linux/ccic/usbpd.h b/include/linux/ccic/usbpd.h
index fb6f9d85e48b..56712b18c980 100644
--- a/include/linux/ccic/usbpd.h
+++ b/include/linux/ccic/usbpd.h
@@ -33,7 +33,7 @@
#define tVDMWaitModeExit (50) /* 40~50 ms */
#define tDiscoverIdentity (50) /* 40~50 ms */
#define tSwapSourceStart (20) /* 20 ms */
-#define tTypeCSinkWaitCap (600) /* 310~620 ms */
+#define tTypeCSinkWaitCap (310) /* 310~620 ms */
/* Protocol States */
typedef enum {
@@ -184,25 +184,31 @@ typedef enum {
PE_VCS_Send_Swap = 0xC6,
PE_VCS_Reject_VCONN_Swap = 0xC7,
+ /* UVDM Message */
+ PE_DFP_UVDM_Send_Message = 0xD0,
+ PE_DFP_UVDM_Receive_Message = 0xD1,
+
Error_Recovery = 0xFF
} policy_state;
typedef enum usbpd_manager_command {
MANAGER_REQ_GET_SNKCAP = 1,
- MANAGER_REQ_GOTOMIN = 2,
- MANAGER_REQ_SRCCAP_CHANGE = 3,
- MANAGER_REQ_PR_SWAP = 4,
- MANAGER_REQ_DR_SWAP = 5,
- MANAGER_REQ_VCONN_SWAP = 6,
- MANAGER_REQ_VDM_DISCOVER_IDENTITY = 7,
- MANAGER_REQ_VDM_DISCOVER_SVID = 8,
- MANAGER_REQ_VDM_DISCOVER_MODE = 9,
- MANAGER_REQ_VDM_ENTER_MODE = 10,
- MANAGER_REQ_VDM_EXIT_MODE = 11,
- MANAGER_REQ_VDM_ATTENTION = 12,
- MANAGER_REQ_VDM_STATUS_UPDATE = 13,
- MANAGER_REQ_VDM_DisplayPort_Configure = 14,
- MANAGER_REQ_NEW_POWER_SRC = 15,
+ MANAGER_REQ_GOTOMIN = 1 << 2,
+ MANAGER_REQ_SRCCAP_CHANGE = 1 << 3,
+ MANAGER_REQ_PR_SWAP = 1 << 4,
+ MANAGER_REQ_DR_SWAP = 1 << 5,
+ MANAGER_REQ_VCONN_SWAP = 1 << 6,
+ MANAGER_REQ_VDM_DISCOVER_IDENTITY = 1 << 7,
+ MANAGER_REQ_VDM_DISCOVER_SVID = 1 << 8,
+ MANAGER_REQ_VDM_DISCOVER_MODE = 1 << 9,
+ MANAGER_REQ_VDM_ENTER_MODE = 1 << 10,
+ MANAGER_REQ_VDM_EXIT_MODE = 1 << 11,
+ MANAGER_REQ_VDM_ATTENTION = 1 << 12,
+ MANAGER_REQ_VDM_STATUS_UPDATE = 1 << 13,
+ MANAGER_REQ_VDM_DisplayPort_Configure = 1 << 14,
+ MANAGER_REQ_NEW_POWER_SRC = 1 << 15,
+ MANAGER_REQ_UVDM_SEND_MESSAGE = 1 << 16,
+ MANAGER_REQ_UVDM_RECEIVE_MESSAGE = 1 << 17,
} usbpd_manager_command_type;
typedef enum usbpd_manager_event {
@@ -222,6 +228,9 @@ typedef enum usbpd_manager_event {
MANAGER_DisplayPort_Configure_ACKED = 13,
MANAGER_DisplayPort_Configure_NACKED = 14,
MANAGER_NEW_POWER_SRC = 15,
+ MANAGER_UVDM_SEND_MESSAGE = 16,
+ MANAGER_UVDM_RECEIVE_MESSAGE = 17,
+ MANAGER_START_DISCOVER_IDENTITY = 18,
} usbpd_manager_event_type;
enum usbpd_msg_status {
@@ -253,7 +262,7 @@ enum usbpd_msg_status {
PLUG_ATTACH = 1<<25,
MSG_HARDRESET = 1<<26,
CC_DETECT = 1<<27,
- PLUG_WAKEUP = 1<<28,
+ UVDM_MSG = 1<<28,
MSG_PASS = 1<<29,
MSG_RID = 1<<30,
MSG_NONE = 1<<31,
@@ -355,7 +364,11 @@ struct usbpd_manager_data {
usbpd_manager_command_type cmd; /* request to policy engine */
usbpd_manager_event_type event; /* policy engine infromed */
+ msg_header_type uvdm_msg_header;
+ data_obj_type uvdm_data_obj[USBPD_MAX_COUNT_MSG_OBJECT];
+
int alt_sended;
+ int vdm_en;
/* request */
int max_power;
int op_power;
@@ -386,6 +399,12 @@ struct usbpd_manager_data {
bool vconn_source_swap;
bool vbus_short;
+ bool is_samsung_accessory_enter_mode;
+ bool uvdm_first_req;
+ bool uvdm_dir;
+ struct completion uvdm_out_wait;
+ struct completion uvdm_in_wait;
+
uint16_t Vendor_ID;
uint16_t Product_ID;
uint16_t Device_Version;
@@ -394,8 +413,12 @@ struct usbpd_manager_data {
uint16_t SVID_1;
uint16_t Standard_Vendor_ID;
+ struct mutex vdm_mutex;
+
struct usbpd_data *pd_data;
struct delayed_work acc_detach_handler;
+ struct delayed_work select_pdo_handler;
+ struct delayed_work start_discover_msg_handler;
muic_attached_dev_t attached_dev;
};
diff --git a/include/linux/ccic/usbpd_ext.h b/include/linux/ccic/usbpd_ext.h
index 667658a22b09..af3103d2a6da 100644
--- a/include/linux/ccic/usbpd_ext.h
+++ b/include/linux/ccic/usbpd_ext.h
@@ -55,7 +55,7 @@ enum {
#define SEC_UVDM_RESPONDER_ACK 0x1
#define SEC_UVDM_RESPONDER_NAK 0x2
#define SEC_UVDM_RESPONDER_BUSY 0x3
-#define SEC_UVDM_UNSTRUCTURED_VDM 0x0
+#define SEC_UVDM_UNSTRUCTURED_VDM 0x4
/*For DP Pin Assignment */
#define DP_PIN_ASSIGNMENT_NODE 0x00000000
diff --git a/include/linux/ccic/usbpd_msg.h b/include/linux/ccic/usbpd_msg.h
index 39f377ff7026..936c5e6cbc10 100644
--- a/include/linux/ccic/usbpd_msg.h
+++ b/include/linux/ccic/usbpd_msg.h
@@ -6,6 +6,26 @@
#define PD_SID (0xFF00)
#define PD_SID_1 (0xFF01)
+#define MAX_INPUT_DATA (255)
+#define SEC_UVDM_ALIGN (4)
+#define SEC_UVDM_WAIT_MS (5000)
+#define SEC_UVDM_MAXDATA_FIRST (12)
+#define SEC_UVDM_MAXDATA_NORMAL (16)
+#define SEC_UVDM_CHECKSUM_COUNT (20)
+
+enum uvdm_res_type {
+ RES_INIT = 0,
+ RES_ACK,
+ RES_NAK,
+ RES_BUSY,
+};
+
+enum uvdm_rx_type {
+ RX_ACK = 0,
+ RX_NAK,
+ RX_BUSY,
+};
+
typedef union {
u16 word;
u8 byte[2];
@@ -170,6 +190,69 @@ typedef union {
} vdm_svid;
} data_obj_type;
+typedef union {
+ u32 object;
+ u16 word[2];
+ u8 byte[4];
+ struct {
+ unsigned vendor_defined:15;
+ unsigned vdm_type:1;
+ unsigned vendor_id:16;
+ };
+} uvdm_header;
+
+typedef union {
+ u32 object;
+ u16 word[2];
+ u8 byte[4];
+
+ struct{
+ unsigned data:8;
+ unsigned total_set_num:4;
+ unsigned direction:1;
+ unsigned cmd_type:2;
+ unsigned data_type:1;
+ unsigned pid:16;
+ };
+} s_uvdm_header;
+
+typedef union {
+ u32 object;
+ u16 word[2];
+ u8 byte[4];
+
+ struct{
+ unsigned cur_size:8;
+ unsigned total_size:8;
+ unsigned reserved:12;
+ unsigned order_cur_set:4;
+ };
+} s_tx_header;
+
+typedef union {
+ u32 object;
+ u16 word[2];
+ u8 byte[4];
+
+ struct{
+ unsigned checksum:16;
+ unsigned reserved:16;
+ };
+} s_tx_tailer;
+
+typedef union {
+ u32 object;
+ u16 word[2];
+ u8 byte[4];
+
+ struct{
+ unsigned reserved:18;
+ unsigned result_value:2;
+ unsigned rcv_data_size:8;
+ unsigned order_cur_set:4;
+ };
+} s_rx_header;
+
typedef enum {
POWER_TYPE_FIXED = 0,
POWER_TYPE_BATTERY,