f130420e51
It is becoming obvious that having the PCI/MSI code in the same file as the the core ITS code is giving people implementing non-PCI MSI support the wrong kind of idea. In order to make things a bit clearer, let's move the PCI/MSI code out to its own file. Hopefully it will make it clear that whoever thinks of hooking into the core ITS better have a very strong point. We use a temporary entry point that will get removed in a subsequent patch, once the proper infrastructure is added. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-12-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
106 lines
2.7 KiB
C
106 lines
2.7 KiB
C
/*
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* Copyright (C) 2013-2015 ARM Limited, All Rights Reserved.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/msi.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_pci.h>
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#include <linux/irqchip/arm-gic-v3.h>
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static void its_mask_msi_irq(struct irq_data *d)
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{
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pci_msi_mask_irq(d);
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irq_chip_mask_parent(d);
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}
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static void its_unmask_msi_irq(struct irq_data *d)
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{
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pci_msi_unmask_irq(d);
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irq_chip_unmask_parent(d);
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}
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static struct irq_chip its_msi_irq_chip = {
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.name = "ITS-MSI",
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.irq_unmask = its_unmask_msi_irq,
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.irq_mask = its_mask_msi_irq,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_write_msi_msg = pci_msi_domain_write_msg,
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};
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struct its_pci_alias {
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struct pci_dev *pdev;
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u32 dev_id;
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u32 count;
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};
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static int its_pci_msi_vec_count(struct pci_dev *pdev)
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{
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int msi, msix;
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msi = max(pci_msi_vec_count(pdev), 0);
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msix = max(pci_msix_vec_count(pdev), 0);
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return max(msi, msix);
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}
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static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
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{
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struct its_pci_alias *dev_alias = data;
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dev_alias->dev_id = alias;
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if (pdev != dev_alias->pdev)
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dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev);
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return 0;
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}
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static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
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int nvec, msi_alloc_info_t *info)
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{
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struct pci_dev *pdev;
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struct its_pci_alias dev_alias;
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if (!dev_is_pci(dev))
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return -EINVAL;
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pdev = to_pci_dev(dev);
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dev_alias.pdev = pdev;
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dev_alias.count = nvec;
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pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias);
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return its_msi_prepare(domain, dev_alias.dev_id, dev_alias.count, info);
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}
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static struct msi_domain_ops its_pci_msi_ops = {
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.msi_prepare = its_pci_msi_prepare,
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};
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static struct msi_domain_info its_pci_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX),
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.ops = &its_pci_msi_ops,
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.chip = &its_msi_irq_chip,
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};
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struct irq_domain *its_pci_msi_alloc_domain(struct device_node *np,
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struct irq_domain *parent)
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{
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return pci_msi_create_irq_domain(np, &its_pci_msi_domain_info, parent);
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}
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