b8628f3fe4
Although kernel doesn't support the multiple IRQ priority levels provided by HS38x core intc yet, ensure that the default prio value is used anyways by relevant code. SLEEP insn needs to be provided the IRQ priority level which can interrupt it. This needs to be the default level which maynot necessarily be 0 as assumed by current code. This change allows a kernel with ARCV2_IRQ_DEF_PRIO = 1 to boot fine. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
128 lines
2.6 KiB
C
128 lines
2.6 KiB
C
/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_IRQFLAGS_ARCV2_H
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#define __ASM_IRQFLAGS_ARCV2_H
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#include <asm/arcregs.h>
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/* status32 Bits */
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#define STATUS_AD_BIT 19 /* Disable Align chk: core supports non-aligned */
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#define STATUS_IE_BIT 31
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#define STATUS_AD_MASK (1<<STATUS_AD_BIT)
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#define STATUS_IE_MASK (1<<STATUS_IE_BIT)
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#define AUX_USER_SP 0x00D
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#define AUX_IRQ_CTRL 0x00E
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#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
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#define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
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#define AUX_IRQ_PRIORITY 0x206
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#define ICAUSE 0x40a
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#define AUX_IRQ_SELECT 0x40b
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#define AUX_IRQ_ENABLE 0x40c
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/* Was Intr taken in User Mode */
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#define AUX_IRQ_ACT_BIT_U 31
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/* 0 is highest level, but taken by FIRQs, if present in design */
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#define ARCV2_IRQ_DEF_PRIO 0
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/* seed value for status register */
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#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
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(ARCV2_IRQ_DEF_PRIO << 1))
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/* SLEEP needs default irq priority (<=) which can interrupt the doze */
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#define ISA_SLEEP_ARG (0x10 | ARCV2_IRQ_DEF_PRIO)
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#ifndef __ASSEMBLY__
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/*
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* Save IRQ state and disable IRQs
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*/
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static inline long arch_local_irq_save(void)
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{
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unsigned long flags;
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__asm__ __volatile__(" clri %0 \n" : "=r" (flags) : : "memory");
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return flags;
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}
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/*
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* restore saved IRQ state
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*/
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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__asm__ __volatile__(" seti %0 \n" : : "r" (flags) : "memory");
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}
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/*
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* Unconditionally Enable IRQs
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*/
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static inline void arch_local_irq_enable(void)
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{
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unsigned int irqact = read_aux_reg(AUX_IRQ_ACT);
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if (irqact & 0xffff)
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write_aux_reg(AUX_IRQ_ACT, irqact & ~0xffff);
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__asm__ __volatile__(" seti \n" : : : "memory");
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}
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/*
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* Unconditionally Disable IRQs
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*/
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static inline void arch_local_irq_disable(void)
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{
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__asm__ __volatile__(" clri \n" : : : "memory");
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}
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/*
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* save IRQ state
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*/
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static inline long arch_local_save_flags(void)
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{
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unsigned long temp;
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__asm__ __volatile__(
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" lr %0, [status32] \n"
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: "=&r"(temp)
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:
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: "memory");
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return temp;
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}
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/*
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* Query IRQ state
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*/
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & (STATUS_IE_MASK));
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}
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static inline int arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#else
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.macro IRQ_DISABLE scratch
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clri
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.endm
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.macro IRQ_ENABLE scratch
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seti
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.endm
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#endif /* __ASSEMBLY__ */
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#endif
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