a7y18lte-ubports/android_kernel_samsung_universal7885
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[ARM] omap: fix lots of 'Using plain integer as NULL pointer'

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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2008-09-05 15:10:27 +01:00 committed by Russell King
parent 7c7095aa42
commit c0fc18c5bf
5 changed files with 18 additions and 18 deletions
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8
arch/arm/mach-omap1/clock.c
View File

@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
return -EINVAL; return -EINVAL;
parent = clk->parent; parent = clk->parent;
if (unlikely(parent == 0)) if (unlikely(parent == NULL))
return -EIO; return -EIO;
realrate = parent->rate; realrate = parent->rate;
@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
if (clk->flags & ALWAYS_ENABLED) if (clk->flags & ALWAYS_ENABLED)
return 0; return 0;
if (unlikely(clk->enable_reg == 0)) { if (unlikely(clk->enable_reg == NULL)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n", printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name); clk->name);
return -EINVAL; return -EINVAL;
@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk)
__u16 regval16; __u16 regval16;
__u32 regval32; __u32 regval32;
if (clk->enable_reg == 0) if (clk->enable_reg == NULL)
return; return;
if (clk->flags & ENABLE_REG_32BIT) { if (clk->flags & ENABLE_REG_32BIT) {
@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
return clk->parent->rate / (1 << dsor_exp); return clk->parent->rate / (1 << dsor_exp);
} }
if(clk->round_rate != 0) if (clk->round_rate != NULL)
return clk->round_rate(clk, rate); return clk->round_rate(clk, rate);
return clk->rate; return clk->rate;

18
arch/arm/mach-omap2/clock.c
View File

@ -251,7 +251,7 @@ int _omap2_clk_enable(struct clk *clk)
if (clk->enable) if (clk->enable)
return clk->enable(clk); return clk->enable(clk);
if (unlikely(clk->enable_reg == 0)) { if (unlikely(clk->enable_reg == NULL)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n", printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name); clk->name);
return 0; /* REVISIT: -EINVAL */ return 0; /* REVISIT: -EINVAL */
@ -283,7 +283,7 @@ void _omap2_clk_disable(struct clk *clk)
return; return;
} }
if (clk->enable_reg == 0) { if (clk->enable_reg == NULL) {
/* /*
* 'Independent' here refers to a clock which is not * 'Independent' here refers to a clock which is not
* controlled by its parent. * controlled by its parent.
@ -477,7 +477,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate)
/* Given a clock and a rate apply a clock specific rounding function */ /* Given a clock and a rate apply a clock specific rounding function */
long omap2_clk_round_rate(struct clk *clk, unsigned long rate) long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
{ {
if (clk->round_rate != 0) if (clk->round_rate != NULL)
return clk->round_rate(clk, rate); return clk->round_rate(clk, rate);
if (clk->flags & RATE_FIXED) if (clk->flags & RATE_FIXED)
@ -566,7 +566,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
*/ */
void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask) void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask)
{ {
if (unlikely((clk->clksel_reg == 0) || (clk->clksel_mask == 0))) if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL)))
return NULL; return NULL;
*field_mask = clk->clksel_mask; *field_mask = clk->clksel_mask;
@ -586,7 +586,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk)
void __iomem *div_addr; void __iomem *div_addr;
div_addr = omap2_get_clksel(clk, &field_mask); div_addr = omap2_get_clksel(clk, &field_mask);
if (div_addr == 0) if (div_addr == NULL)
return 0; return 0;
field_val = __raw_readl(div_addr) & field_mask; field_val = __raw_readl(div_addr) & field_mask;
@ -605,7 +605,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL; return -EINVAL;
div_addr = omap2_get_clksel(clk, &field_mask); div_addr = omap2_get_clksel(clk, &field_mask);
if (div_addr == 0) if (div_addr == NULL)
return -EINVAL; return -EINVAL;
field_val = omap2_divisor_to_clksel(clk, new_div); field_val = omap2_divisor_to_clksel(clk, new_div);
@ -643,7 +643,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL; return -EINVAL;
/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
if (clk->set_rate != 0) if (clk->set_rate != NULL)
ret = clk->set_rate(clk, rate); ret = clk->set_rate(clk, rate);
if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
@ -664,7 +664,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
const struct clksel_rate *clkr; const struct clksel_rate *clkr;
*parent_div = 0; *parent_div = 0;
*src_addr = 0; *src_addr = NULL;
clks = omap2_get_clksel_by_parent(clk, src_clk); clks = omap2_get_clksel_by_parent(clk, src_clk);
if (clks == NULL) if (clks == NULL)
@ -705,7 +705,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
field_val = omap2_clksel_get_src_field(&src_addr, new_parent, field_val = omap2_clksel_get_src_field(&src_addr, new_parent,
&field_mask, clk, &parent_div); &field_mask, clk, &parent_div);
if (src_addr == 0) if (src_addr == NULL)
return -EINVAL; return -EINVAL;
if (clk->usecount > 0) if (clk->usecount > 0)

2
arch/arm/mach-omap2/serial.c
View File

@ -108,7 +108,7 @@ void __init omap_serial_init()
struct plat_serial8250_port *p = serial_platform_data + i; struct plat_serial8250_port *p = serial_platform_data + i;
if (!(info->enabled_uarts & (1 << i))) { if (!(info->enabled_uarts & (1 << i))) {
p->membase = 0; p->membase = NULL;
p->mapbase = 0; p->mapbase = 0;
continue; continue;
} }

2
arch/arm/plat-omap/dma.c
View File

@ -1233,7 +1233,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
/* request and reserve DMA channels for the chain */ /* request and reserve DMA channels for the chain */
for (i = 0; i < no_of_chans; i++) { for (i = 0; i < no_of_chans; i++) {
err = omap_request_dma(dev_id, dev_name, err = omap_request_dma(dev_id, dev_name,
callback, 0, &channels[i]); callback, NULL, &channels[i]);
if (err < 0) { if (err < 0) {
int j; int j;
for (j = 0; j < i; j++) for (j = 0; j < i; j++)

6
drivers/video/omap/omapfb_main.c
View File

@ -740,7 +740,7 @@ static int omapfb_update_win(struct fb_info *fbi,
int ret; int ret;
omapfb_rqueue_lock(plane->fbdev); omapfb_rqueue_lock(plane->fbdev);
ret = omapfb_update_window_async(fbi, win, NULL, 0); ret = omapfb_update_window_async(fbi, win, NULL, NULL);
omapfb_rqueue_unlock(plane->fbdev); omapfb_rqueue_unlock(plane->fbdev);
return ret; return ret;
@ -768,7 +768,7 @@ static int omapfb_update_full_screen(struct fb_info *fbi)
win.format = 0; win.format = 0;
omapfb_rqueue_lock(fbdev); omapfb_rqueue_lock(fbdev);
r = fbdev->ctrl->update_window(fbi, &win, NULL, 0); r = fbdev->ctrl->update_window(fbi, &win, NULL, NULL);
omapfb_rqueue_unlock(fbdev); omapfb_rqueue_unlock(fbdev);
return r; return r;
@ -1047,7 +1047,7 @@ void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval)
win.height = 2; win.height = 2;
win.out_width = 2; win.out_width = 2;
win.out_height = 2; win.out_height = 2;
fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, 0); fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, NULL);
} }
omapfb_rqueue_unlock(fbdev); omapfb_rqueue_unlock(fbdev);
} }