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ARM: OMAP2+: powerdomain: fix whitespace, improve flag comments

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Fix some whitespace problems introduced by commit
da03ce65b5 ("OMAP3: powerdomain data:
add voltage domains").  Also, improve the documentation for the struct
powerdomain.flags field.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Paul Walmsley 2013-01-26 00:58:17 -07:00
parent 9249387019
commit 562e54d13b
4 changed files with 42 additions and 40 deletions
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24
arch/arm/mach-omap2/powerdomain.h
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@ -43,18 +43,20 @@
#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON) #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)
/* Powerdomain flags */ /*
#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ * Powerdomain flags (struct powerdomain.flags)
#define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits *
* in MEM bank 1 position. This is * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
* true for OMAP3430 *
*/ * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /* * bank 1 position. This is true for OMAP3430
* support to transition from a *
* sleep state to a lower sleep * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
* state without waking up the * to a lower sleep state without waking up the powerdomain
* powerdomain
*/ */
#define PWRDM_HAS_HDWR_SAR BIT(0)
#define PWRDM_HAS_MPU_QUIRK BIT(1)
#define PWRDM_HAS_LOWPOWERSTATECHANGE BIT(2)
/* /*
* Number of memory banks that are power-controllable. On OMAP4430, the * Number of memory banks that are power-controllable. On OMAP4430, the