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ssb: fix pcicore build breakage

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drivers/ssb/main.c:1336: error: 'SSB_PCICORE_BCAST_ADDR' undeclared (first use in this function)
drivers/ssb/main.c:1337: error: 'SSB_PCICORE_BCAST_DATA' undeclared (first use in this function)
drivers/ssb/main.c:1349: error: 'struct ssb_pcicore' has no member named 'dev'

Reported-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
John W. Linville 2011-05-13 09:23:47 -04:00
parent 6b86bd62a5
commit 1159024d4c
1 changed files with 10 additions and 4 deletions
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14
drivers/ssb/main.c
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@ -1332,21 +1332,27 @@ EXPORT_SYMBOL(ssb_bus_powerup);
static void ssb_broadcast_value(struct ssb_device *dev, static void ssb_broadcast_value(struct ssb_device *dev,
u32 address, u32 data) u32 address, u32 data)
{ {
#ifdef CONFIG_SSB_DRIVER_PCICORE
/* This is used for both, PCI and ChipCommon core, so be careful. */ /* This is used for both, PCI and ChipCommon core, so be careful. */
BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR); BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA); BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
#endif
ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address); ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */ ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data); ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */ ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
} }
void ssb_commit_settings(struct ssb_bus *bus) void ssb_commit_settings(struct ssb_bus *bus)
{ {
struct ssb_device *dev; struct ssb_device *dev;
#ifdef CONFIG_SSB_DRIVER_PCICORE
dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev; dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
#else
dev = bus->chipco.dev;
#endif
if (WARN_ON(!dev)) if (WARN_ON(!dev))
return; return;
/* This forces an update of the cached registers. */ /* This forces an update of the cached registers. */