89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
/*
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* Interrupt support for Cirrus Logic CS47L92
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*
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* Copyright 2016 Cirrus Logic
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/regmap.h>
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#include <linux/mfd/madera/core.h>
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#include <linux/mfd/madera/registers.h>
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#include "irq-madera.h"
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static const struct regmap_irq cs47l92_irqs[MADERA_NUM_IRQ] = {
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[MADERA_IRQ_BOOT_DONE] = { .reg_offset = 0,
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.mask = MADERA_BOOT_DONE_EINT1 },
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[MADERA_IRQ_CTRLIF_ERR] = { .reg_offset = 0,
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.mask = MADERA_CTRLIF_ERR_EINT1 },
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[MADERA_IRQ_FLL1_LOCK] = { .reg_offset = 1,
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.mask = MADERA_FLL1_LOCK_EINT1 },
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[MADERA_IRQ_FLL2_LOCK] = { .reg_offset = 1,
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.mask = MADERA_FLL2_LOCK_EINT1},
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[MADERA_IRQ_MICDET1] = { .reg_offset = 5,
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.mask = MADERA_MICDET1_EINT1 },
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[MADERA_IRQ_MICDET2] = { .reg_offset = 5,
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.mask = MADERA_MICDET2_EINT1 },
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[MADERA_IRQ_HPDET] = { .reg_offset = 5,
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.mask = MADERA_HPDET_EINT1},
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[MADERA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6,
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.mask = MADERA_MICD_CLAMP_RISE_EINT1 },
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[MADERA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6,
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.mask = MADERA_MICD_CLAMP_FALL_EINT1 },
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[MADERA_IRQ_JD1_FALL] = { .reg_offset = 6,
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.mask = MADERA_JD1_FALL_EINT1 },
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[MADERA_IRQ_JD1_RISE] = { .reg_offset = 6,
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.mask = MADERA_JD1_RISE_EINT1 },
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[MADERA_IRQ_ASRC1_IN1_LOCK] = { .reg_offset = 8,
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.mask = MADERA_ASRC1_IN1_LOCK_EINT1 },
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[MADERA_IRQ_ASRC1_IN2_LOCK] = { .reg_offset = 8,
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.mask = MADERA_ASRC1_IN2_LOCK_EINT1 },
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[MADERA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8,
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.mask = MADERA_DRC2_SIG_DET_EINT1 },
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[MADERA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8,
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.mask = MADERA_DRC1_SIG_DET_EINT1 },
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[MADERA_IRQ_DSP_IRQ1] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ1_EINT1},
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[MADERA_IRQ_DSP_IRQ2] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ2_EINT1},
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[MADERA_IRQ_DSP_IRQ3] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ3_EINT1},
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[MADERA_IRQ_DSP_IRQ4] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ4_EINT1},
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[MADERA_IRQ_DSP_IRQ5] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ5_EINT1},
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[MADERA_IRQ_DSP_IRQ6] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ6_EINT1},
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[MADERA_IRQ_DSP_IRQ7] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ7_EINT1},
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[MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 10,
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.mask = MADERA_DSP_IRQ8_EINT1},
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[MADERA_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 32,
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.mask = MADERA_ADSP_ERROR_STATUS_DSP1},
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};
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const struct regmap_irq_chip cs47l92_irq = {
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.name = "cs47l92 IRQ",
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.status_base = MADERA_IRQ1_STATUS_1,
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.mask_base = MADERA_IRQ1_MASK_1,
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.ack_base = MADERA_IRQ1_STATUS_1,
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.num_regs = 33,
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.irqs = cs47l92_irqs,
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.num_irqs = ARRAY_SIZE(cs47l92_irqs),
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};
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EXPORT_SYMBOL_GPL(cs47l92_irq);
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