android_kernel_samsung_a7y1.../arch/x86/lib
Janakarajan Natarajan 5c8a49e8f8 x86/asm: Fix MWAITX C-state hint value
commit 454de1e7d970d6bc567686052329e4814842867c upstream.

As per "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose
and System Instructions", MWAITX EAX[7:4]+1 specifies the optional hint
of the optimized C-state. For C0 state, EAX[7:4] should be set to 0xf.

Currently, a value of 0xf is set for EAX[3:0] instead of EAX[7:4]. Fix
this by changing MWAITX_DISABLE_CSTATES from 0xf to 0xf0.

This hasn't had any implications so far because setting reserved bits in
EAX is simply ignored by the CPU.

 [ bp: Fixup comment in delay_mwaitx() and massage. ]

Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Frederic Weisbecker <frederic@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "x86@kernel.org" <x86@kernel.org>
Cc: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Cc: <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20191007190011.4859-1-Janakarajan.Natarajan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-07 08:15:35 +02:00
..
atomic64_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
atomic64_386_32.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
atomic64_cx8_32.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
cache-smp.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
checksum_32.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
clear_page_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
cmdline.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
cmpxchg8b_emu.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
cmpxchg16b_emu.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
copy_page_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
copy_user_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
csum-copy_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
csum-partial_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
csum-wrappers_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
delay.c x86/asm: Fix MWAITX C-state hint value 2020-04-07 08:15:35 +02:00
getuser.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hweight.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
inat.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
insn.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
iomap_copy_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
Makefile A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
memcpy_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
memcpy_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
memmove_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
memset_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
misc.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmx_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
msr-reg-export.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
msr-reg.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
msr-smp.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
msr.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
putuser.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
retpoline.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
rwsem.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
string_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
strstr_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
usercopy_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
usercopy_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
usercopy.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
x86-opcode-map.txt A750FXXU4CTBC 2020-03-27 21:51:54 +05:30