Ben Zhang c4db5e62c9 ASoC: rt5677: Mark reg RT5677_PWR_ANLG2 as volatile ... [ Upstream commit eabf424f7b60246c76dcb0ea6f1e83ef9abbeaa6 ] The codec dies when RT5677_PWR_ANLG2(MX-64h) is set to 0xACE1 while it's streaming audio over SPI. The DSP firmware turns on PLL2 (MX-64 bit 8) when SPI streaming starts. However regmap does not believe that register can change by itself. When BST1 (bit 15) is turned on with regmap_update_bits(), it doesn't read the register first before write, so PLL2 power bit is cleared by accident. Marking MX-64h as volatile in regmap solved the issue. Signed-off-by: Ben Zhang <benzh@chromium.org> Signed-off-by: Curtis Malainey <cujomalainey@chromium.org> Link: https://lore.kernel.org/r/20191106011335.223061-6-cujomalainey@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2020-04-07 13:21:32 +02:00
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aoa
arm
atmel
core	ALSA: pcm: oss: Avoid potential buffer overflows	2020-04-07 12:45:42 +02:00
drivers
firewire	ALSA: isight: fix leak of reference to firewire unit in error path of .probe callback	2020-04-07 12:34:13 +02:00
hda	Revert "ALSA: hda: Flush interrupts on disabling"	2020-04-07 09:28:46 +02:00
i2c	ALSA: i2c/cs8427: Fix int to char conversion	2020-04-07 12:35:00 +02:00
isa
mips
oss
parisc
pci	ALSA: hda/ca0132 - Avoid endless loop	2020-04-07 13:20:00 +02:00
pcmcia
ppc
sh
soc	ASoC: rt5677: Mark reg RT5677_PWR_ANLG2 as volatile	2020-04-07 13:21:32 +02:00
sparc
spi
synth
usb	ALSA: usb-audio: not submit urb for stopped endpoint	2020-04-07 12:23:34 +02:00
ac97_bus.c
Kconfig
last.c
Makefile
sound_core.c
sound_firmware.c