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Akeem G Abodunrin 59c19c8e9e drm/i915/gen9: Clear residual context state on context switch 
commit bc8a76a152c5f9ef3b48104154a65a68a8b76946 upstream.

Intel ID: PSIRT-TA-201910-001
CVEID: CVE-2019-14615

Intel GPU Hardware prior to Gen11 does not clear EU state
during a context switch. This can result in information
leakage between contexts.

For Gen8 and Gen9, hardware provides a mechanism for
fast cleardown of the EU state, by issuing a PIPE_CONTROL
with bit 27 set. We can use this in a context batch buffer
to explicitly cleardown the state on every context switch.

As this workaround is already in place for gen8, we can borrow
the code verbatim for Gen9.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Cc: Kumar Valsan Prathap <prathap.kumar.valsan@intel.com>
Cc: Chris Wilson <chris.p.wilson@intel.com>
Cc: Balestrieri Francesco <francesco.balestrieri@intel.com>
Cc: Bloomfield Jon <jon.bloomfield@intel.com>
Cc: Dutt Sudeep <sudeep.dutt@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-07 13:33:10 +02:00
..
dvo_ch7xxx.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo_ch7017.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo_ivch.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo_ns2501.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo_sil164.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo_tfp410.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dvo.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_cmd_parser.c drm/i915/cmdparser: Fix jump whitelist clearing 2020-04-07 11:59:34 +02:00
i915_debugfs.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_dma.c drm/i915: Add gen9 BCS cmdparsing 2020-04-07 11:59:20 +02:00
i915_drv.c drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
i915_drv.h drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
i915_gem_batch_pool.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_batch_pool.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_context.c drm/i915/cmdparser: Add support for backward jumps 2020-04-07 11:59:24 +02:00
i915_gem_debug.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_dmabuf.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_evict.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_execbuffer.c drm/i915/cmdparser: Add support for backward jumps 2020-04-07 11:59:24 +02:00
i915_gem_fence.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_gtt.c drm/i915: Add gen9 BCS cmdparsing 2020-04-07 11:59:20 +02:00
i915_gem_gtt.h drm/i915/gtt: Read-only pages for insert_entries on bdw+ 2020-04-07 11:59:03 +02:00
i915_gem_render_state.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_render_state.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_shrinker.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_stolen.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_tiling.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem_userptr.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gem.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_gpu_error.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_guc_reg.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_guc_submission.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_ioc32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_irq.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_params.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_reg.h drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
i915_suspend.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_sysfs.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_trace_points.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_trace.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_vgpu.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
i915_vgpu.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_acpi.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_atomic_plane.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_atomic.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_audio.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_bios.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_bios.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_crt.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_csr.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_ddi.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_display.c drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
intel_dp_mst.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_dp.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_drv.h drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
intel_dsi_panel_vbt.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_dsi_pll.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_dsi.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_dsi.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_dvo.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_fbc.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_fbdev.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_fifo_underrun.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_frontbuffer.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_guc_fwif.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_guc_loader.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_guc.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_hdmi.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_hotplug.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_i2c.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_lrc.c drm/i915/gen9: Clear residual context state on context switch 2020-04-07 13:33:10 +02:00
intel_lrc.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_lvds.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_mocs.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_mocs.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_modes.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_opregion.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_overlay.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_panel.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_pm.c drm/i915/gen8+: Add RC6 CTX corruption WA 2020-04-07 11:59:31 +02:00
intel_psr.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_renderstate_gen6.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_renderstate_gen7.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_renderstate_gen8.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_renderstate_gen9.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_renderstate.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_ringbuffer.c drm/i915/gtt: Read-only pages for insert_entries on bdw+ 2020-04-07 11:59:03 +02:00
intel_ringbuffer.h drm/i915: Add support for mandatory cmdparsing 2020-04-07 11:59:14 +02:00
intel_runtime_pm.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_sdvo_regs.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_sdvo.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_sideband.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_sprite.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_tv.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
intel_uncore.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
Kconfig A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
Makefile A750FXXU4CTBC 2020-03-27 21:51:54 +05:30