140 lines
4.4 KiB
C
140 lines
4.4 KiB
C
/*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS - PMU(Power Management Unit) support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __EXYNOS_PMU_CP_H
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#define __EXYNOS_PMU_CP_H __FILE__
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/* BLK_ALIVE: CP related SFRs */
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#define EXYNOS_PMU_CP_CTRL_NS 0x0030
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#define EXYNOS_PMU_CP_CTRL_S 0x0034
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#define EXYNOS_PMU_CP_STAT 0x0038
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#define EXYNOS_PMU_CP_DEBUG 0x003C
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#define EXYNOS_PMU_UART_IO_SHARE_CTRL 0x6200
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#define EXYNOS_PMU_CP_ADDR_CFG0 0x7140
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#define EXYNOS_PMU_CP_ADDR_CFG1 0x7144
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#define EXYNOS_PMU_CP_ADDR_CFG2 0x7148
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#define EXYNOS_PMU_CP_ADDR_CFG3 0x714C
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#define EXYNOS_PMU_CP_ADDR_CFG4 0x7150
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#define EXYNOS_PMU_CP_ADDR_CFG5 0x7154
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#define EXYNOS_PMU_CP_ADDR_CFG6 0x7158
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#define EXYNOS_PMU_CP_ADDR_CFG7 0x715C
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#define EXYNOS_PMU_CP_ADDR_CFG8 0x7160
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#define EXYNOS_PMU_CP_ADDR_CFG9 0x7164
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#define EXYNOS_PMU_CP_ADDR_CFG10 0x7168
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#define EXYNOS_PMU_CP_ADDR_CFG11 0x716C
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#define EXYNOS_PMU_CP_ADDR_CFG12 0x7170
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#define EXYNOS_PMU_CP_ADDR_CFG13 0x7174
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#define EXYNOS_PMU_CP_ADDR_CFG14 0x7178
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#define EXYNOS_PMU_CP_ADDR_CFG_ADDRMAP 0x717C
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#define EXYNOS_PMU_CP2AP_MEM_CONFIG0 0x7200
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#define EXYNOS_PMU_CP2AP_MEM_CONFIG1 0x7204
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#define EXYNOS_PMU_CP2AP_MEM_CONFIG2 0x7208
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#define EXYNOS_PMU_CP2AP_ADDR_RNG 0x720C
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN0 0x7210
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN1 0x7214
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN2 0x7218
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN3 0x721C
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN4 0x7220
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#define EXYNOS_PMU_CP2AP_MIF_ACCESS_WIN5 0x7224
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN0 0x7228
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN1 0x722C
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN2 0x7230
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN3 0x7234
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN4 0x7238
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#define EXYNOS_PMU_CP2AP_PERI_ACCESS_WIN5 0x723C
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#define EXYNOS_PMU_CP_BOOT_TEST_RST_CONFIG 0x7240
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#define EXYNOS_PMU_CP_ADDR_MAP_ACCESS_WIN_START 0x7244
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#define EXYNOS_PMU_CP_ADDR_MAP_ACCESS_WIN_END 0x7248
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#define EXYNOS_PMU_CENTRAL_SEQ_CP_CONFIGURATION 0x0280
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#define EXYNOS_PMU_CENTRAL_SEQ_CP_STATUS 0x0284
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#define EXYNOS_PMU_RESET_SEQUENCER_STATUS 0x0504
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#define EXYNOS_PMU_RESET_AHEAD_CP_SYS_PWR_REG 0x1320
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#define EXYNOS_PMU_CLEANY_BUS_CP_SYS_PWR_REG 0x1324
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#define EXYNOS_PMU_LOGIC_RESET_CP_SYS_PWR_REG 0x1328
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#define EXYNOS_PMU_TCXO_GATE_SYS_PWR_REG 0x132C
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#define EXYNOS_PMU_CP_DISABLE_ISO_SYS_PWR_REG 0X1330
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#define EXYNOS_PMU_RESET_ISO_SYS_PWR_REG 0X1334
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#define EXYNOS_PMU_PC_SYS_PWR_REG 0X1338
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/* EXYNOS_PMU_CENTRAL_SEQ_CP_STATUS */
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#define CENTRAL_SEQ_CP_STATUS_MASK (0xFF << 16)
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#define CENTRAL_SEQ_CP_STATUS_SHIFT 16
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/* EXYNOS_PMU_UART_IO_SHARE_CTRL */
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#define SEL_CP_UART_DBG BIT(8)
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#define SEL_UART_DBG_GPIO BIT(4)
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#define FUNC_ISO_EN BIT(0)
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/* EXYNOS_PMU_CP_CTRL_NS */
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#define CP_PWRON BIT(1)
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#define CP_RESET_SET BIT(2)
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#define CP_ACTIVE_REQ_EN BIT(5)
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#define CP_ACTIVE_REQ_CLR BIT(6)
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#define CP_RESET_REQ_EN BIT(7)
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#define CP_RESET_REQ_CLR BIT(8)
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#define MASK_CP_PWRDN_DONE BIT(9)
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#define RTC_OUT_EN BIT(10)
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#define SET_SW_MIF_REQ BIT(12)
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#define MASK_MIF_REQ BIT(13)
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#define SWEEPER_BYPASS_DATA_EN BIT(16)
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#define SELECT_DUMP_PC_NO_PG BIT(17)
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#define WDT_FLAG BIT(20)
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#define WDT_FLAG_CLR_EN BIT(21)
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#define MASK_COMMON_CP_RESET BIT(24)
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#define TCXO_SEL BIT(28)
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#define CR7_MP_DISABLE BIT(29)
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/* EXYNOS_PMU_CP_CTRL_N */
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#define CP_START BIT(3)
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/* EXYNOS_PMU_CP_STAT */
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#define CP_PWRDN_DONE BIT(0)
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#define CP_ACCESS_MIF BIT(4)
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#define SMC_ID 0x82000700
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#define READ_CTRL 0x3
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#define WRITE_CTRL 0x4
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enum cp_mode {
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CP_POWER_ON,
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CP_RESET,
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CP_POWER_OFF,
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NUM_CP_MODE,
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};
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enum reset_mode {
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CP_HW_RESET,
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CP_SW_RESET,
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};
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enum cp_control {
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CP_CTRL_S,
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CP_CTRL_NS,
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};
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extern int exynos_cp_reset(void);
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extern int exynos_cp_release(void);
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extern int exynos_cp_init(void);
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extern int exynos_cp_active_clear(void);
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extern int exynos_clear_cp_reset(void);
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extern int exynos_get_cp_power_status(void);
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extern int exynos_set_cp_power_onoff(enum cp_mode mode);
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extern void exynos_sys_powerdown_conf_cp(void);
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extern int exynos_pmu_cp_init(void);
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extern int exynos_enable_cp_dump_pc(void);
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extern int exynos_disable_cp_dump_pc(void);
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#endif /* __EXYNOS_PMU_CP_H */
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