android_kernel_samsung_a7y1.../arch/powerpc/mm
Mike Rapoport ebf3d5f889 powerpc: Ensure that swiotlb buffer is allocated from low memory
[ Upstream commit 8fabc623238e68b3ac63c0dd1657bf86c1fa33af ]

Some powerpc platforms (e.g. 85xx) limit DMA-able memory way below 4G.
If a system has more physical memory than this limit, the swiotlb
buffer is not addressable because it is allocated from memblock using
top-down mode.

Force memblock to bottom-up mode before calling swiotlb_init() to
ensure that the swiotlb buffer is DMA-able.

Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20191204123524.22919-1-rppt@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-04-07 13:28:44 +02:00
..
40x_mmu.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
44x_mmu.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
copro_fault.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
dma-noncoherent.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
fault.c powerpc/mm: Make NULL pointer deferences explicit on bad page faults. 2020-04-07 12:42:21 +02:00
fsl_booke_mmu.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hash_low_32.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hash_low_64.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hash_native_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hash_utils_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
highmem.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hugepage-hash64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hugetlbpage-book3e.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hugetlbpage-hash64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
hugetlbpage.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
icswx_pid.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
icswx.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
icswx.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
init_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
init_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
Makefile A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mem.c powerpc: Ensure that swiotlb buffer is allocated from low memory 2020-04-07 13:28:44 +02:00
mmap.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmu_context_hash32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmu_context_hash64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmu_context_iommu.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmu_context_nohash.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
mmu_decl.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
numa.c powerpc/numa: improve control of topology updates 2020-04-06 18:18:51 +02:00
pgtable_32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
pgtable_64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
pgtable.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
ppc_mmu_32.c powerpc/book3s/32: fix number of bats in p/v_block_mapped() 2020-04-07 12:42:00 +02:00
slb_low.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
slb.c powerpc/64s/hash: Fix stab_rr off by one initialization 2020-04-07 12:28:33 +02:00
slice.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
subpage-prot.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
tlb_hash32.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
tlb_hash64.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
tlb_low_64e.S powerpc/fsl: Flush the branch predictor at each kernel entry (64bit) 2020-04-06 16:40:19 +02:00
tlb_nohash_low.S A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
tlb_nohash.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
vphn.c A750FXXU4CTBC 2020-03-27 21:51:54 +05:30
vphn.h A750FXXU4CTBC 2020-03-27 21:51:54 +05:30