diff --git a/main/linux-postmarketos-rockchip/0001-phy-rockchip-typec-Set-extcon-capabilities.patch b/main/linux-postmarketos-rockchip/0001-phy-rockchip-typec-Set-extcon-capabilities.patch deleted file mode 100644 index 0630853bc..000000000 --- a/main/linux-postmarketos-rockchip/0001-phy-rockchip-typec-Set-extcon-capabilities.patch +++ /dev/null @@ -1,49 +0,0 @@ -From db4e9ffdb985752ae3c3436ff86f8f376ae8fd22 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Thu, 28 May 2020 14:25:32 +0200 -Subject: [PATCH] phy: rockchip: typec: Set extcon capabilities - -Do not mainline, hack. - -Signed-off-by: Tobias Schramm ---- - drivers/phy/rockchip/phy-rockchip-typec.c | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c -index 70a31251b202..5385bb4f0bd4 100644 ---- a/drivers/phy/rockchip/phy-rockchip-typec.c -+++ b/drivers/phy/rockchip/phy-rockchip-typec.c -@@ -40,6 +40,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1160,6 +1161,22 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev) - dev_err(dev, "Invalid or missing extcon\n"); - return PTR_ERR(tcphy->extcon); - } -+ } else { -+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB, -+ EXTCON_PROP_USB_SS); -+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, -+ EXTCON_PROP_USB_SS); -+ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, -+ EXTCON_PROP_USB_SS); -+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB, -+ EXTCON_PROP_USB_TYPEC_POLARITY); -+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST, -+ EXTCON_PROP_USB_TYPEC_POLARITY); -+ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP, -+ EXTCON_PROP_USB_TYPEC_POLARITY); -+ extcon_sync(tcphy->extcon, EXTCON_USB); -+ extcon_sync(tcphy->extcon, EXTCON_USB_HOST); -+ extcon_sync(tcphy->extcon, EXTCON_DISP_DP); - } - - pm_runtime_enable(dev); --- -GitLab diff --git a/main/linux-postmarketos-rockchip/0002-arm64-dts-rockchip-add-typec-extcon-hack.patch b/main/linux-postmarketos-rockchip/0002-arm64-dts-rockchip-add-typec-extcon-hack.patch deleted file mode 100644 index 5c6839eec..000000000 --- a/main/linux-postmarketos-rockchip/0002-arm64-dts-rockchip-add-typec-extcon-hack.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 948d7ade0ddcf292b91d91cb8b6819a19ab3f604 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Thu, 28 May 2020 14:44:15 +0200 -Subject: [PATCH] arm64: dts: rockchip: add typec extcon hack - -Not for mainline - -Signed-off-by: Tobias Schramm ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index decb212e2dca..37f967a89401 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -401,6 +401,7 @@ opp08 { - - &cdn_dp { - status = "okay"; -+ extcon = <&fusb0>; - }; - - &cpu_b0 { -@@ -735,6 +736,9 @@ connector { - ; - try-power-role = "sink"; - -+ extcon-cables = <1 2 5 6 9 10 12 44>; -+ typec-altmodes = <0xff01 1 0x001c0000 1>; -+ - ports { - #address-cells = <1>; - #size-cells = <0>; -@@ -1002,6 +1006,7 @@ spiflash: flash@0 { - }; - - &tcphy0 { -+ extcon = <&fusb0>; - status = "okay"; - }; - --- -GitLab diff --git a/main/linux-postmarketos-rockchip/0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch b/main/linux-postmarketos-rockchip/0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch deleted file mode 100644 index ae406ce4a..000000000 --- a/main/linux-postmarketos-rockchip/0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a8f3e4ffe533f952a468cb8f3d067865bd58144f Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Sat, 6 Jun 2020 23:45:10 +0200 -Subject: [PATCH] arm64: dts: rockchip: setup USB type c port as dual data role - -Some chargers try to put the charged device into device data role. -Before this commit this condition caused the tcpm state machine to -issue a hard reset due to a capability missmatch. - -Signed-off-by: Tobias Schramm ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index c505c88b5d9b..d77dca5524ff 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -726,7 +726,7 @@ fusb0: fusb30x@22 { - - connector { - compatible = "usb-c-connector"; -- data-role = "host"; -+ data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; --- -GitLab diff --git a/main/linux-postmarketos-rockchip/0004-arm64-rockchip-add-DP-ALT-rockpro64.patch b/main/linux-postmarketos-rockchip/0004-arm64-rockchip-add-DP-ALT-rockpro64.patch deleted file mode 100644 index d24ade597..000000000 --- a/main/linux-postmarketos-rockchip/0004-arm64-rockchip-add-DP-ALT-rockpro64.patch +++ /dev/null @@ -1,130 +0,0 @@ -From 52e17051609757eca49cc31acb6e1ed9b19a7d54 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= -Date: Sun, 18 Oct 2020 21:37:42 +0200 -Subject: [PATCH 06/11] ayufan: dts: rockpro64: add type-c DP ALT - ---- - .../boot/dts/rockchip/rk3399-rockpro64.dtsi | 54 +++++++++++++++++++ - 1 file changed, 54 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -index 6e553ff47534..ec2de6622f4c 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -@@ -6,6 +6,7 @@ - - #include - #include -+#include - #include "rk3399.dtsi" - #include "rk3399-opp.dtsi" - -@@ -191,6 +192,11 @@ vdd_log: vdd-log { - }; - }; - -+&cdn_dp { -+ status = "okay"; -+ extcon = <&fusb0>; -+}; -+ - &cpu_l0 { - cpu-supply = <&vdd_cpu_l>; - }; -@@ -505,6 +511,54 @@ fusb0: typec-portc@22 { - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vcc5v0_typec>; - status = "okay"; -+ -+ connector { -+ compatible = "usb-c-connector"; -+ data-role = "host"; -+ label = "USB-C"; -+ op-sink-microwatt = <1000000>; -+ power-role = "dual"; -+ sink-pdos = -+ ; -+ source-pdos = -+ ; -+ try-power-role = "sink"; -+ -+ extcon-cables = <1 2 5 6 9 10 12 44>; -+ typec-altmodes = <0xff01 1 0x001c0c00 1>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ usbc_hs: endpoint { -+ remote-endpoint = -+ <&u2phy0_typec_hs>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ -+ usbc_ss: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_ss>; -+ }; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ -+ usbc_dp: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_dp>; -+ }; -+ }; -+ }; -+ }; - }; - }; - -@@ -735,9 +811,26 @@ - }; - - &tcphy0 { -+ extcon = <&fusb0>; - status = "okay"; - }; - -+&tcphy0_dp { -+ port { -+ tcphy0_typec_dp: endpoint { -+ remote-endpoint = <&usbc_dp>; -+ }; -+ }; -+}; -+ -+&tcphy0_usb3 { -+ port { -+ tcphy0_typec_ss: endpoint { -+ remote-endpoint = <&usbc_ss>; -+ }; -+ }; -+}; -+ - &tcphy1 { - status = "okay"; - }; -@@ -761,6 +854,12 @@ - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -+ -+ port { -+ u2phy0_typec_hs: endpoint { -+ remote-endpoint = <&usbc_hs>; -+ }; -+ }; - }; - - &u2phy1 { --- -2.25.1 diff --git a/main/linux-postmarketos-rockchip/0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch b/main/linux-postmarketos-rockchip/0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch deleted file mode 100644 index 5fe02ec50..000000000 --- a/main/linux-postmarketos-rockchip/0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch +++ /dev/null @@ -1,43 +0,0 @@ -From bdd540aa2a4eb304afb6e9d6e469b856c7b441c7 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= -Date: Fri, 10 Apr 2020 00:24:03 +0200 -Subject: [PATCH 2/2] ayufan: drm: rockchip: add support for modeline 32MHz - (ex. `1024x600@43`) - ---- - drivers/clk/rockchip/clk-rk3399.c | 1 + - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ++++++ - 2 files changed, 7 insertions(+) - -diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c -index 7df2f1e00347..5dcf9b5778a3 100644 ---- a/drivers/clk/rockchip/clk-rk3399.c -+++ b/drivers/clk/rockchip/clk-rk3399.c -@@ -101,6 +101,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = { - RK3036_PLL_RATE( 74250000, 2, 99, 4, 4, 1, 0), - RK3036_PLL_RATE( 65000000, 1, 65, 6, 4, 1, 0), - RK3036_PLL_RATE( 54000000, 1, 54, 6, 4, 1, 0), -+ RK3036_PLL_RATE( 32000000, 3, 112, 7, 4, 0, 0), - RK3036_PLL_RATE( 27000000, 1, 27, 6, 4, 1, 0), - { /* sentinel */ }, - }; -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 23de359a1dec..9ad35ed3018e 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -84,6 +84,12 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { - { 0x2153, 0x0000}, - { 0x40f3, 0x0000} - }, -+ }, { -+ 32000000, { -+ { 0x0072, 0x0001}, -+ { 0x2153, 0x0000}, -+ { 0x40f3, 0x0000} -+ }, - }, { - 36000000, { - { 0x00b3, 0x0000}, --- -2.25.1 - diff --git a/main/linux-postmarketos-rockchip/0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch b/main/linux-postmarketos-rockchip/0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch deleted file mode 100644 index 81bea87d6..000000000 --- a/main/linux-postmarketos-rockchip/0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch +++ /dev/null @@ -1,194 +0,0 @@ -From ceae51b1cc0e5a5b42999274657bd55606193661 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Jari=20H=C3=A4m=C3=A4l=C3=A4inen?= -Date: Sun, 22 Nov 2020 15:24:49 +0200 -Subject: [PATCH] nuumio: pcie: Reimplement rockchip PCIe bus scan delay - -Reimplementation of my old Rockchip PCIe bus scan delay patch for -kernels >= 5.9. - -Delay may fix panix with some PCIe devices, like LSI SAS 9201-8i with -SAS2008 chipset in my case. - -Crash dump (customized Manjaro kernel before this patch): -[ 1.229856] SError Interrupt on CPU4, code 0xbf000002 -- SError -[ 1.229860] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.9.9-2.0-MANJARO-ARM #1 -[ 1.229862] Hardware name: Pine64 RockPro64 v2.1 (DT) -[ 1.229864] pstate: 60000085 (nZCv daIf -PAN -UAO BTYPE=--) -[ 1.229866] pc : rockchip_pcie_rd_conf+0xb4/0x270 -[ 1.229868] lr : rockchip_pcie_rd_conf+0x1b4/0x270 -[ 1.229870] sp : ffff80001004b850 -[ 1.229872] x29: ffff80001004b850 x28: 0000000000000001 -[ 1.229877] x27: 0000000000000000 x26: ffff00007a795000 -[ 1.229882] x25: ffff00007a7910b0 x24: 0000000000000000 -[ 1.229887] x23: 0000000000000000 x22: ffff00007b3a4380 -[ 1.229891] x21: ffff80001004b8c4 x20: 0000000000000004 -[ 1.229895] x19: 0000000000100000 x18: 0000000000000020 -[ 1.229900] x17: 0000000000000001 x16: 0000000000000019 -[ 1.229904] x15: ffff00007b222fd8 x14: ffffffffffffffff -[ 1.229908] x13: ffff00007a79ba1c x12: ffff00007a79b290 -[ 1.229912] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f -[ 1.229917] x9 : ff72646268756463 x8 : 0000000000000391 -[ 1.229921] x7 : ffff80001004b880 x6 : 0000000000000001 -[ 1.229925] x5 : 0000000000000000 x4 : 0000000000000000 -[ 1.229930] x3 : 0000000000c00008 x2 : 000000000080000a -[ 1.229934] x1 : 0000000000000000 x0 : ffff800014000000 -[ 1.229939] Kernel panic - not syncing: Asynchronous SError Interrupt -[ 1.229942] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.9.9-2.0-MANJARO-ARM #1 -[ 1.229944] Hardware name: Pine64 RockPro64 v2.1 (DT) -[ 1.229946] Call trace: -[ 1.229948] dump_backtrace+0x0/0x1d0 -[ 1.229949] show_stack+0x18/0x24 -[ 1.229951] dump_stack+0xc0/0x118 -[ 1.229953] panic+0x148/0x320 -[ 1.229955] nmi_panic+0x8c/0x90 -[ 1.229956] arm64_serror_panic+0x78/0x84 -[ 1.229958] do_serror+0x15c/0x160 -[ 1.229960] el1_error+0x84/0x100 -[ 1.229962] rockchip_pcie_rd_conf+0xb4/0x270 -[ 1.229964] pci_bus_read_config_dword+0x6c/0xd0 -[ 1.229966] pci_bus_generic_read_dev_vendor_id+0x34/0x1b0 -[ 1.229968] pci_scan_single_device+0xa4/0x144 -[ 1.229970] pci_scan_slot+0x40/0x12c -[ 1.229972] pci_scan_child_bus_extend+0x58/0x34c -[ 1.229974] pci_scan_bridge_extend+0x310/0x590 -[ 1.229976] pci_scan_child_bus_extend+0x210/0x34c -[ 1.229978] pci_scan_root_bus_bridge+0x68/0xdc -[ 1.229980] pci_host_probe+0x18/0xc4 -[ 1.229981] rockchip_pcie_probe+0x204/0x330 -[ 1.229984] platform_drv_probe+0x54/0xb0 -[ 1.229985] really_probe+0xe8/0x500 -[ 1.229987] driver_probe_device+0xd8/0xf0 -[ 1.229989] device_driver_attach+0xc0/0xcc -[ 1.229991] __driver_attach+0xa4/0x170 -[ 1.229993] bus_for_each_dev+0x70/0xc0 -[ 1.229994] driver_attach+0x24/0x30 -[ 1.229996] bus_add_driver+0x140/0x234 -[ 1.229998] driver_register+0x78/0x130 -[ 1.230000] __platform_driver_register+0x4c/0x60 -[ 1.230002] rockchip_pcie_driver_init+0x1c/0x28 -[ 1.230004] do_one_initcall+0x54/0x1c0 -[ 1.230005] do_initcalls+0xf4/0x130 -[ 1.230007] kernel_init_freeable+0x144/0x19c -[ 1.230009] kernel_init+0x14/0x11c -[ 1.230011] ret_from_fork+0x10/0x34 -[ 1.230035] SMP: stopping secondary CPUs -[ 1.230037] Kernel Offset: disabled -[ 1.230039] CPU features: 0x0240022,2100200c -[ 1.230041] Memory Limit: none ---- - .../admin-guide/kernel-parameters.txt | 8 ++++++ - .../boot/dts/rockchip/rk3399-rockpro64.dtsi | 1 + - drivers/pci/controller/pcie-rockchip-host.c | 25 +++++++++++++++++++ - drivers/pci/controller/pcie-rockchip.c | 6 +++++ - drivers/pci/controller/pcie-rockchip.h | 2 ++ - 5 files changed, 42 insertions(+) - -diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 44fde25bb221..941dc943eb84 100644 ---- a/Documentation/admin-guide/kernel-parameters.txt -+++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -3816,6 +3816,14 @@ - nomsi Do not use MSI for native PCIe PME signaling (this makes - all PCIe root ports use INTx for all services). - -+ pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before -+ scanning PCIe bus in Rockchip PCIe host driver. Some PCIe -+ cards seem to need delays that can be several hundred ms. -+ If set to greater than or equal to 0 this parameter will -+ override delay that can be set in device tree. -+ Values less than 0 mean that this parameter is ignored. -+ default=-1 -+ - pcmv= [HW,PCMCIA] BadgePAD 4 - - pd_ignore_unused -diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c -index 9705059523a6..632dac43a037 100644 ---- a/drivers/pci/controller/pcie-rockchip-host.c -+++ b/drivers/pci/controller/pcie-rockchip-host.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -39,6 +40,9 @@ - #include "../pci.h" - #include "pcie-rockchip.h" - -+static int bus_scan_delay = -1; -+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO); -+ - static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) - { - u32 status; -@@ -942,6 +946,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev) - struct device *dev = &pdev->dev; - struct pci_host_bridge *bridge; - int err; -+ u32 delay = 0; - - if (!dev->of_node) - return -ENODEV; -@@ -993,6 +998,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev) - bridge->sysdata = rockchip; - bridge->ops = &rockchip_pcie_ops; - -+ /* Checking if bus scan delay was given from command line and prefer -+ * that over the value in device tree (which defaults to 0 if not set). -+ */ -+ if (bus_scan_delay >= 0) { -+ delay = bus_scan_delay; -+ dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay); -+ } else { -+ delay = rockchip->bus_scan_delay; -+ dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay); -+ } -+ /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge -+ * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when -+ * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack) -+ * before panicing. I have no idea why this works or what causes the panic. I just -+ * found this hack by luck when trying to "make it break differently if possible". -+ */ -+ if (delay > 0) { -+ msleep(delay); -+ } -+ - err = pci_host_probe(bridge); - if (err < 0) - goto err_remove_irq_domain; -diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c -index 904dec0d3a88..e6c97f9944ba 100644 ---- a/drivers/pci/controller/pcie-rockchip.c -+++ b/drivers/pci/controller/pcie-rockchip.c -@@ -149,6 +149,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) - return PTR_ERR(rockchip->clk_pcie_pm); - } - -+ err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay); -+ if (err) { -+ dev_info(dev, "no bus scan delay, default to 0 ms\n"); -+ rockchip->bus_scan_delay = 0; -+ } -+ - return 0; - } - EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt); -diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h -index c7d0178fc8c2..52fd2108b704 100644 ---- a/drivers/pci/controller/pcie-rockchip.h -+++ b/drivers/pci/controller/pcie-rockchip.h -@@ -306,6 +306,8 @@ struct rockchip_pcie { - phys_addr_t msg_bus_addr; - bool is_rc; - struct resource *mem_res; -+ /* Bus scan delay is a workaround for some pcie devices causing crashes */ -+ u32 bus_scan_delay; - }; - - static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg) --- -2.29.2 - diff --git a/main/linux-postmarketos-rockchip/APKBUILD b/main/linux-postmarketos-rockchip/APKBUILD index 493198976..f7e5a9de2 100644 --- a/main/linux-postmarketos-rockchip/APKBUILD +++ b/main/linux-postmarketos-rockchip/APKBUILD @@ -10,8 +10,8 @@ # boot failure pkgname=linux-postmarketos-rockchip -pkgver=5.13.0 -pkgrel=1 +pkgver=5.13.4 +pkgrel=0 pkgdesc="Mainline kernel for rockchip devices" arch="aarch64" _carch="arm64" @@ -36,9 +36,6 @@ makedepends=" rsync gzip xz - clang - lld - llvm11 " # Source @@ -48,17 +45,8 @@ case $pkgver in *.*) _kernver=$pkgver;; esac -export LLVM=1 -export LLVM_IAS=1 - source=" https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz - 0001-phy-rockchip-typec-Set-extcon-capabilities.patch - 0002-arm64-dts-rockchip-add-typec-extcon-hack.patch - 0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch - 0004-arm64-rockchip-add-DP-ALT-rockpro64.patch - 0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch - 0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch $_config " builddir="$srcdir/linux-$_kernver" @@ -71,7 +59,7 @@ prepare() { build() { unset LDFLAGS - make ARCH="$_carch" CC=clang \ + make ARCH="$_carch" \ KBUILD_BUILD_VERSION="$((pkgrel + 1 ))-$_flavor" } @@ -90,12 +78,6 @@ package() { sha512sums=" -a8edf97e9d38a49f1be2bde1e29ad96274bb2c6f7e8a2bebaa1161dd4df9cabcbaec4ff644c45bee94f86ae47725087d6deed0cd954209cec717621d137db85e linux-5.13.tar.xz -10949558a6e3316ea57497f377fd120d6704f3b81725317556e49d10b570a40edb06643b06738116abbe3096be485761d436f1a0d1861bd34fc18ea45068b6b0 0001-phy-rockchip-typec-Set-extcon-capabilities.patch -b7291eecfddc7ebe9393eea864e0ee28960e8cc2f87dfc42d09426b5619f46ded97c38fb8bf26f4eea1f26bfe21396094505b3efb8676691f8751e2ffabe50ec 0002-arm64-dts-rockchip-add-typec-extcon-hack.patch -427b81472de2a473344269b2da06ac338af42e68620a281a9cb8543e545e6ed7f719acaf68c688e518b65d2132e0c66676ba5e30376ec980fd6eeaea05c2a8be 0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch -206fc67879c883e5ce72e748f4afb7135c21a447a5fa3c59c2863355c24c7134b89768801ddef15fdc38602f6c7978bb63eb8f68871e8dc8440eabef4de0e627 0004-arm64-rockchip-add-DP-ALT-rockpro64.patch -e2afcf9db5bb033c545fcb938ee5179adc7993368d89312ae484a7fbf1987a0b6566f17c6677f2c6f6a13c7d4bea227592206d55b35209269ff9f4704473b3f7 0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch -e820ddd51fd03106b56a1ce325b1316259a4d0dbf0565b2f3888f64beb44e0b4ef049be08888db4557b5c14945ae3f5ac782896fb84fc2b8c8f130fb7be44bd5 0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch +dcd44f0da2420093f6ed8e44df4ed81fb8123fbc25d2dcdddd633feb3fc455ec74ef7a683a9c249e7089981393fcbed10c41aad10d4b0108c964cbd485e359e5 linux-5.13.4.tar.xz c13d39dba1e0be41116c1f712aac1ca00fc68616a01afd103428fa2b01c44ad6190abf7f9d3f7fd0ff280e6ac953f2817eaf0c5659c5611f51cb3994df3ffa9b config-postmarketos-rockchip.aarch64 "