68 lines
1.8 KiB
Plaintext
68 lines
1.8 KiB
Plaintext
Qualcomm Technologies, Inc. clock controller based PWM driver
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Qualcomm Technologies, Inc. provides clock controller to be connected to LED
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to generate PWM. This driver can configure duty-cycle of clock to get the
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required brightness. The complete clock duty-cycle is 100 and brightness is
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denoted by the period in which signal is active or high.
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Required properties:
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- compatible: Should be "qcom,clk-led-pwm".
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- clock_names: Should be "core".
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- clocks: Should contain the phandle of the source clock.
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- assgined-clocks: Phandle of the source clock.
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- assinged-clock-rates: Desired frequency of the source clock.
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- qcom,max_duty: Maximum duty cycle that can be set on the clock.
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Should be less than 100.
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- pinctrl-names: Property should contain "active" and "sleep" for the
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pin configurations during the usecase and during idle.
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- pinctrl-x: phandle to the default/sleep pin configurations.
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Optional properties:
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- qcom,label: Label for the sysfs node.
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Example:
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qcom_clk_led {
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compatible = "qcom,clk-led-pwm";
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qcom,label = "led_clk_pwm";
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qcom,max_duty = <80>;
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clocks = <&clock_gcc GCC_GP2_CLK>;
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clock-names = "core";
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assigned-clocks = <&clock_gcc GCC_GP2_CLK>;
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assigned-clock-rates = <80000>;
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pinctrl-names = "active", "sleep";
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pinctrl-0 = <&qcom_clk_led_gp2_active>;
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pinctrl-1 = <&qcom_clk_led_gp2_sleep>;
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};
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== Pinctrl configurations ==
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qcom_clk_led_gp2_pins: qcom_clk_led_gp2_pins {
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qcom_clk_led_gp2_active: qcom_clk_led_gp2_active {
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mux {
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pins = "gpio21";
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function = "gcc_gp2";
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};
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config {
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pins = "gpio21";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qcom_clk_led_gp2_sleep: qqcom_clk_led_gp2_sleep {
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mux {
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pins = "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio21";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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