28 lines
998 B
Plaintext
28 lines
998 B
Plaintext
Qualcomm Technologies, Inc. NPU Clock & Reset Controller Binding
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Required properties :
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- compatible : must contain "qcom,npucc-sm8150" or "qcom,npucc-sm8150-v2"
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or "qcom,npucc-sa8155" or "qcom,npucc-sa8155-v2"
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or "qcom,npucc-sdmmagpie" or "qcom,atoll-npucc".
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- reg : shall contain base register location and length.
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- reg-names: names of registers listed in the same order as in
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the reg property.
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- vdd_cx-supply: phandle to the CX rail that needs to be voted
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on behalf of the NPU CC clocks.
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- vdd_gdsc-supply: phandle to the NPU core GDSC that needs to be
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toggled as part of the CRC sequence.
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- #clock-cells : shall contain 1.
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- #reset-cells : shall contain 1.
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Example:
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clock_npucc: qcom,npucc {
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compatible = "qcom,npucc-sm8150";
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reg = <0x9910000 0x10000>;
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reg-names = "cc_base";
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vdd_cx-supply = <&pm8150l_s6_level>;
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vdd_gdsc-supply = <&npu_core_gdsc>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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