Qualcomm Technologies, Inc. NPU Clock & Reset Controller Binding
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Required properties :
- compatible : must contain "qcom,npucc-sm8150" or "qcom,npucc-sm8150-v2"
		or "qcom,npucc-sa8155" or "qcom,npucc-sa8155-v2"
		or "qcom,npucc-sdmmagpie" or "qcom,atoll-npucc".
- reg : shall contain base register location and length.
- reg-names: names of registers listed in the same order as in
	     the reg property.
- vdd_cx-supply: phandle to the CX rail that needs to be voted
		 on behalf of the NPU CC clocks.
- vdd_gdsc-supply: phandle to the NPU core GDSC that needs to be
		   toggled as part of the CRC sequence.
- #clock-cells : shall contain 1.
- #reset-cells : shall contain 1.

Example:
	clock_npucc: qcom,npucc {
		compatible = "qcom,npucc-sm8150";
		reg = <0x9910000 0x10000>;
		reg-names = "cc_base";
		vdd_cx-supply = <&pm8150l_s6_level>;
		vdd_gdsc-supply = <&npu_core_gdsc>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};